公开(公告)号：US09935204B2

公开(公告)日：2018-04-03

申请号：US15246526

申请日：2016-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-hun Lee ,  Dong-won Kim

IPC: H01L29/786 ,  H01L27/11 ,  H01L29/06 ,  H01L29/423 ,  G11C11/419 ,  H01L29/66 ,  H01L29/78 ,  H01L27/11578 ,  H01L29/10

CPC classification number: H01L29/78696 ,  G11C11/419 ,  H01L27/1104 ,  H01L27/11578 ,  H01L29/0673 ,  H01L29/1037 ,  H01L29/42392 ,  H01L29/66787 ,  H01L29/785

Abstract: A static random access memory (SRAM) device includes a circuit element that includes a first inverter having a first load transistor and a first drive transistor and a second inverter having a second load transistor and a second drive transistor. Input and output nodes of the first inverter and the second inverter are cross-connected to each other. A first transfer transistor is connected to the output node of the first inverter, and a second transfer transistor is connected to the output nodes of the second inverter. Each of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having multi-bridge channels. At least one of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having a different number of multi-bridge channels from the other transistors.

公开(公告)号：US10930649B2

公开(公告)日：2021-02-23

申请号：US16358118

申请日：2019-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US10374099B2

公开(公告)日：2019-08-06

申请号：US15911148

申请日：2018-03-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-hun Lee ,  Dong-won Kim

IPC: H01L29/786 ,  H01L27/11 ,  H01L29/06 ,  H01L29/423 ,  G11C11/419 ,  H01L27/146 ,  H01L29/66 ,  H01L29/78 ,  H01L27/11578 ,  H01L29/10

Abstract: A static random access memory (SRAM) device includes a circuit element that includes a first inverter having a first load transistor and a first drive transistor and a second inverter having a second load transistor and a second drive transistor. Input and output nodes of the first inverter and the second inverter are cross-connected to each other. A first transfer transistor is connected to the output node of the first inverter, and a second transfer transistor is connected to the output nodes of the second inverter. Each of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having multi-bridge channels. At least one of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having a different number of multi-bridge channels from the other transistors.

公开(公告)号：US20230282642A1

公开(公告)日：2023-09-07

申请号：US18314569

申请日：2023-05-09

Applicant: SAMSUNG ELECTRONICS CO.,LTD.

Inventor： Myung-gil KANG ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

CPC classification number: H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/7851 ,  H01L21/823431 ,  H01L29/66795 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/3086 ,  H01L29/66545 ,  H01L21/823468

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US11699763B2

公开(公告)日：2023-07-11

申请号：US17701930

申请日：2022-03-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-hun Lee ,  Dong-won Kim

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  G11C11/419 ,  H01L27/146 ,  H01L21/02 ,  H01L29/10 ,  H01L29/66 ,  H10B10/00 ,  H01L29/78 ,  H10B43/20

CPC classification number: H01L29/78696 ,  G11C11/419 ,  H01L21/02603 ,  H01L21/02606 ,  H01L27/14616 ,  H01L29/0665 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/1025 ,  H01L29/42392 ,  H01L29/66795 ,  H10B10/12 ,  H01L29/1037 ,  H01L29/66787 ,  H01L29/785 ,  H10B43/20

Abstract: A semiconductor device includes a first PMOS transistor, a first NMOS transistor, and a second NMOS transistor connected to an output node of the first PMOS and NMOS transistors. The first PMOS transistor includes first nanowires, first source and drain regions on opposite sides of each first nanowire, and a first gate completely surrounding each first nanowire. The first NMOS transistor includes second nanowires, second source and drain regions on opposite sides of each second nanowire, and a second gate extending from the first gate and completely surrounding each second nanowire. The second NMOS transistor includes third nanowires, third source and drain regions on opposite sides of each third nanowire, and a third gate, separated from the first and second gates, and completely surrounding each third nanowire. A number of third nanowires is greater than that of first nanowires. The first and second gates share respective first and second nanowires.

公开(公告)号：US20220384432A1

公开(公告)日：2022-12-01

申请号：US17886530

申请日：2022-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US11444081B2

公开(公告)日：2022-09-13

申请号：US17150712

申请日：2021-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-gil Kang ,  Beom-jin Park ,  Geum-jong Bae ,  Dong-won Kim ,  Jung-gil Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308

Abstract: An integrated circuit (IC) device includes: a fin-type active area protruding from a substrate and extending in a first horizontal direction; a first nanosheet disposed above an upper surface of the fin-type active area with a first separation space therebetween; a second nanosheet disposed above the first nanosheet with a second separation space therebetween; a gate line extending on the substrate in a second horizontal direction intersecting the first horizontal direction, at least a portion of the gate line being disposed in the second separation space; and a bottom insulation structure disposed in the first separation space.

公开(公告)号：US20200243395A1

公开(公告)日：2020-07-30

申请号：US16845683

申请日：2020-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min Kim ,  Dong-won Kim ,  Geum-jong Bae

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a device region defined by a trench in the substrate. The semiconductor device includes a plurality of fin-shaped active regions spaced apart from each other in the device region and extending in a first direction. The semiconductor device includes a protruding pattern extending along a bottom surface of the trench. Moreover, an interval between the protruding pattern and the plurality of fin-shaped active regions is greater than an interval between two adjacent ones of the plurality of fin-shaped active regions.