公开(公告)号：US12183824B2

公开(公告)日：2024-12-31

申请号：US17611156

申请日：2021-01-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jie Huang ,  Jiayu He ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Fengjuan Liu ,  Nianqi Yao ,  Kun Zhao ,  Tianmin Zhou ,  Jiushi Wang ,  Zhongpeng Tian

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  G02F1/1368

Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include tin, and at least one of indium, gallium and zinc. The first protection layer includes praseodymium used to absorb photo-generated electrons from at least one of the channel layer and the first protection layer which is under light irradiation and reduce a photo-generated current caused by the light irradiation.

公开(公告)号：US20240103328A1

公开(公告)日：2024-03-28

申请号：US17765769

申请日：2021-06-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhen Zhang ,  Fuqiang Li ,  Zhenyu Zhang ,  Yunping Di ,  Lizhong Wang ,  Zheng Fang ,  Jiahui Han ,  Yawei Wang ,  Chenyang Zhang ,  Chengfu Xu ,  Ce Ning ,  Pengxia Liang ,  Feihu Zhou ,  Xianqin Meng ,  Weiting Peng ,  Qiuli Wang ,  Binbin Tong ,  Rui Huang ,  Tianmin Zhou ,  Wei Yang

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/136286 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259

Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.

公开(公告)号：US11217697B2

公开(公告)日：2022-01-04

申请号：US16615358

申请日：2018-04-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Tianmin Zhou ,  Yu Wen

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L29/10 ,  H01L29/167

Abstract: An active layer of the thin-film transistor includes a channel region, a source region and a drain region. The source region and the drain region are respectively arranged on both sides of the channel region, and the channel region includes a polycrystalline silicon structure doped with a fifth group element. A potential difference between the source-drain region and the channel region is increased by doping with the fifth group element.

公开(公告)号：US20210050469A1

公开(公告)日：2021-02-18

申请号：US16812764

申请日：2020-03-09

Applicant: BOE Technology Group Co.,Ltd.

Inventor： Tianmin Zhou ,  Rui Huang ,  Lizhong Wang ,  Jipeng Song ,  Tao Yang ,  Zhaohui Qiang

IPC: H01L31/11 ,  H01L31/0224 ,  H01L31/0236 ,  H01L31/0392

Abstract: A photosensitive device, a manufacturing method thereof, a detection substrate and an array substrate are provided. The photosensitive device is formed on a substrate, and it includes a photosensitive element and a thin film transistor. The photosensitive element includes a first electrode layer on the substrate; a second electrode layer on a side of the first electrode layer distal to the substrate; and a photoelectric conversion layer between the first electrode layer and the second electrode layer. The thin film transistor is electrically connected to the photosensitive element, and it includes a first gate electrode on the substrate; an active layer on a side of the first gate electrode distal to the substrate; and a second gate electrode on a side of the active layer distal to the substrate. The first electrode layer and the second gate electrode are located in the same layer.

公开(公告)号：US10748938B2

公开(公告)日：2020-08-18

申请号：US16134201

申请日：2018-09-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Tianmin Zhou ,  Wei Yang ,  Lizhong Wang ,  Jipeng Song

IPC: H01L21/00 ,  H01L27/12 ,  H01L21/30 ,  H01L29/786

Abstract: an array substrate, a method of manufacturing the array substrate, and a display device are provided. The array substrate includes: a base substrate; a first thin film transistor and a second thin film transistor on the base substrate, wherein the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, and the second active layer is on a side of the first active layer away from the base substrate; and an interlayer dielectric layer and a first buffer layer between the first active layer and the second active layer, wherein the interlayer dielectric layer is capable of supplying hydrogen and the first buffer layer is capable of blocking hydrogen.

公开(公告)号：US20200176612A1

公开(公告)日：2020-06-04

申请号：US16615358

申请日：2018-04-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Tianmin Zhou ,  Yu Wen

IPC: H01L29/786 ,  H01L29/10 ,  H01L29/66 ,  H01L21/02 ,  H01L29/167

Abstract: An active layer of the thin-film transistor includes a channel region, a source region and a drain region. The source region and the drain region are respectively arranged on both sides of the channel region, and the channel region includes a polycrystalline silicon structure doped with a fifth group element. A potential difference between the source-drain region and the channel region is increased by doping with the fifth group element.

公开(公告)号：US12191400B2

公开(公告)日：2025-01-07

申请号：US18322981

申请日：2023-05-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Tianmin Zhou ,  Hehe Hu ,  Xiaochun Xu ,  Nianqi Yao ,  Dapeng Xue ,  Shuilang Dong

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.

公开(公告)号：US12041795B2

公开(公告)日：2024-07-16

申请号：US17427556

申请日：2020-12-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Tianmin Zhou ,  Yupeng Gao ,  Ning Dang

IPC: H10K10/46 ,  H01L29/66 ,  H01L29/786 ,  H10K59/12 ,  H10K59/125 ,  H10K77/10

CPC classification number: H10K10/484 ,  H10K59/125

Abstract: A thin film transistor, a method for manufacturing the same and a display device are disclosed, the thin film transistor includes: a first electrode, a second electrode, an active layer and a flexible conductive layer located on a substrate, one of the first electrode and the second electrode is a source, and the other thereof is a drain; the active layer is electrically coupled with the first electrode, and an orthographic projection of the active layer on the substrate is within an orthographic projection of the first electrode on the substrate; the flexible conductive layer is located on a side of the active layer away from the first electrode, and electrically couples the active layer with the second electrode.

公开(公告)号：US11798959B2

公开(公告)日：2023-10-24

申请号：US16965495

申请日：2019-07-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Guangcai Yuan ,  Ce Ning ,  Xinhong Lu ,  Tianmin Zhou ,  Lizhong Wang

IPC: H01L27/00 ,  H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1248

Abstract: Provided are an array substrate and a manufacturing method thereof, the manufacturing method includes: forming a first active layer on a base substrate; forming a second active layer; forming a second gate on the second active layer; forming a first insulating layer covering the first active layer on the second gate; patterning the first insulating layer to form first via holes at both sides of the second gate to expose the second active layer; depositing a first metal layer in the first via holes and on the first insulating layer; patterning the first metal layer, removing a part of the first metal layer above the first active layer to expose the first insulating layer; etching the first insulating layer using the patterned first metal layer as a mask, forming second via holes above the first active layer to expose the first active layer; cleaning the exposed first active layer.

公开(公告)号：US20230317740A1

公开(公告)日：2023-10-05

申请号：US18021090

申请日：2022-03-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Ce Ning ,  Yunping Di ,  Binbin Tong ,  Rui Huang ,  Tianmin Zhou ,  Wei Yang ,  Liping Lei

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/127

Abstract: The present application provides an array substrate, a manufacturing method for the same, and a display panel. The array substrate includes a display area and a non-display area connected to the display area, and the display area includes a plurality of sub-pixels arranged in an array. The non-display area includes at least one polysilicon transistor, each of the sub-pixels includes an oxide transistor and a pixel electrode. A gate of the oxide transistor as well as a first electrode and a second electrode of the polysilicon transistor are arranged in a same layer; an active layer of the oxide transistor and the pixel electrode are arranged in a same layer, and are in contact with each other. The active layer of the oxide transistor includes an oxide semiconductor material, and the pixel electrode includes an oxide conductor material.