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公开(公告)号:US10510857B2
公开(公告)日:2019-12-17
申请号:US15865793
申请日:2018-01-09
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xinhong Lu , Ke Wang , Wei Yang
IPC: H01L29/49 , H01L29/417 , H01L21/02 , H01L21/311 , H01L29/423 , H01L29/786
Abstract: A method for manufacturing a thin film transistor includes: forming a source electrode and a first insulation pattern, where an orthographic projection of the first insulation pattern at a substrate is within an orthographic projection of the source electrode at the substrate; forming an active layer, a second insulation pattern and a gate electrode on the substrate, an exposed portion of the source electrode not covered by the first insulation pattern and the first insulation pattern; exposing a first portion of the action layer on the first insulation pattern by removing parts of the gate electrode and the second insulation pattern; and performing a plasma treatment to the exposed first portion, thereby forming a drain electrode.
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公开(公告)号:US12269201B2
公开(公告)日:2025-04-08
申请号:US17761039
申请日:2021-05-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Shuqi Liu , Wenyue Fu , Xinhong Lu , Qi Qi , Xiaojie Pan
Abstract: A folding device and a folding method are provided. The folding device includes a bearing and fixing mechanism configured to bear and fix a main body portion of a to-be-folded device; a folding mechanism disposed on at least one lateral side of the bearing and fixing mechanism, the folding mechanism being configured to bear a to-be-folded portion of the to-be-folded device and fold the to-be-folded portion to one side in a thickness direction of the main body portion; a first driving mechanism configured to drive the folding mechanism to move along a direction perpendicular to a bearing surface, which bears the main body portion, of the bearing and fixing mechanism; and a second driving mechanism configured to drive the folding mechanism to move close to or away from the bearing and fixing mechanism along a direction parallel to the bearing surface.
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13.
公开(公告)号:US20240136336A1
公开(公告)日:2024-04-25
申请号:US17769825
申请日:2021-06-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xinhong Lu , Xiaoyan Zhu , Chao Liu , Shuilang Dong , Jiushi Wang , Liuqing Li
IPC: H01L25/075 , H01L25/16 , H01L33/62
CPC classification number: H01L25/0753 , H01L25/167 , H01L33/62 , H01L2933/0066
Abstract: A driving substrate, a light-emitting apparatus and a manufacturing method thereof, a splicing display apparatus, the driving substrate includes: a device disposing area, a bending area and a bonding area, the bending area is located between the device disposing area and the bonding area; the driving substrates located in the device disposing area, the bending area, and the bonding area include a buffer layer, a first conductive layer and a flexible dielectric layer that are stacked in sequence; the driving substrates located in the device disposing area and the bonding area further include a base plate disposed at a side of the buffer layer away from the first conductive layer, and a second conductive layer disposed at a side of the flexible dielectric layer away from the first conductive layer; and the driving substrate located in the bending area is configured to be able to bend along a bending axis.
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公开(公告)号:US11798959B2
公开(公告)日:2023-10-24
申请号:US16965495
申请日:2019-07-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Wei Yang , Guangcai Yuan , Ce Ning , Xinhong Lu , Tianmin Zhou , Lizhong Wang
CPC classification number: H01L27/1288 , H01L27/1248
Abstract: Provided are an array substrate and a manufacturing method thereof, the manufacturing method includes: forming a first active layer on a base substrate; forming a second active layer; forming a second gate on the second active layer; forming a first insulating layer covering the first active layer on the second gate; patterning the first insulating layer to form first via holes at both sides of the second gate to expose the second active layer; depositing a first metal layer in the first via holes and on the first insulating layer; patterning the first metal layer, removing a part of the first metal layer above the first active layer to expose the first insulating layer; etching the first insulating layer using the patterned first metal layer as a mask, forming second via holes above the first active layer to expose the first active layer; cleaning the exposed first active layer.
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公开(公告)号:US11600747B2
公开(公告)日:2023-03-07
申请号:US16959097
申请日:2019-08-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhiwei Liang , Yingwei Liu , Han Yue , Minghua Xuan , Hsuanwei Mai , Zhanfeng Cao , Ke Wang , Huijuan Wang , Guangcai Yuan , Zhijun Lv , Xinhong Lu
Abstract: A display backplane includes a base, a plurality of driving electrodes disposed above the base, and a connection structure disposed on at least one of the plurality of driving electrodes. An orthographic projection of the connection structure on the base is within an orthographic projection of a corresponding driving electrode on the base; and the connection structure includes at least one conductive portion disposed at a first included angle with the corresponding driving electrode.
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公开(公告)号:US20210233467A1
公开(公告)日:2021-07-29
申请号:US16767351
申请日:2019-12-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qingzhao Liu , Guoqiang Wang , Rui Huang , Lizhong Wang , Shuilang Dong , Xinhong Lu
IPC: G09G3/3233 , H01L31/12 , H01L29/78 , H01L27/12 , G09G3/3266
Abstract: The present application discloses a semiconductor apparatus, a pixel circuit and a control method thereof. The semiconductor apparatus comprises: an active layer; a first insulating layer; a first gate and a second gate overlapping with a portion of the active layer with the first insulating layer interposed therebetween, respectively; a first electrode, a second electrode and a third electrode, the first electrode and the second electrode are electrically connected with a first portion and a second portion of the active layer, respectively, the third electrode is used to be electrically connected with a photosensitive device, wherein the third electrode is electrically connected with the first gate or the second gate; or the third electrode is electrically connected with a third portion of the active layer.
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17.
公开(公告)号:US10553621B2
公开(公告)日:2020-02-04
申请号:US16302850
申请日:2018-03-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Hehe Hu , Wei Yang , Xinhong Lu , Ke Wang , Yu Wen
IPC: H01L27/12 , H01L29/66 , H01L29/786 , H01L27/32
Abstract: Embodiment of the present disclosure provide a thin-film transistor structure, a manufacturing method thereof, a display panel and a display device. The thin-film transistor structure includes: a base substrate; and a first thin-film transistor and a second thin-film transistor formed on the base substrate, wherein a first active layer of the first thin-film transistor is doped with hydrogen; a material of a second active layer of the second thin-film transistor is metal oxide; and a first isolation barrier surrounding the first thin-film transistor and/or a second isolation barrier surrounding the second thin-film transistor are disposed on the base substrate.
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公开(公告)号:US11990481B2
公开(公告)日:2024-05-21
申请号:US17418945
申请日:2020-09-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhanfeng Cao , Ke Wang , Zhiwei Liang , Jianguo Wang , Guocai Zhang , Xinhong Lu , Qi Qi
IPC: H01L27/12 , G02F1/13357 , H01L25/075 , H01L27/15 , H01L33/62
CPC classification number: H01L27/124 , G02F1/133603 , H01L25/0753 , H01L27/127 , H01L27/156 , H01L33/62 , H01L2933/0066
Abstract: The present disclosure provides an array substrate and a manufacturing method thereof, a display panel and a backlight module. The manufacturing method of the array substrate includes: providing a base substrate; forming a metal wiring layer on a side of the base substrate, the metal wiring layer including a first copper metal layer; forming a planarization layer on a side of the metal wiring layer away from the base substrate; forming a drive lead layer on a side of the planarization layer away from the base substrate, the drive lead layer being electrically connected to the metal wiring layer, the drive lead layer including a second copper metal layer with a thickness larger than that of the first copper metal layer; forming a functional device layer on a side of the drive lead layer away from the base substrate.
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公开(公告)号:US11923382B2
公开(公告)日:2024-03-05
申请号:US18189569
申请日:2023-03-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Wei Yang , Xinhong Lu
IPC: H01L27/12 , H01L29/66 , H01L29/786 , H10K59/121
CPC classification number: H01L27/1255 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L27/1259 , H01L29/66757 , H01L29/66969 , H01L29/78675 , H01L29/7869 , H10K59/1213 , H10K59/1216
Abstract: A display device is disclosed. The display device includes a display area and a wiring area. The display area is disposed with a first thin film transistor which is an oxide thin film transistor and a second thin film transistor which is a low temperature poly-silicon thin film transistor. A distance between a first active layer of the first thin film transistor and a substrate is different from a distance between a second active layer of the second thin film transistor and the substrate. The first thin film transistor includes first vias that receive a first source/drain. The second thin film transistor includes second vias that receives a second source/drain. The wiring area is provided with a groove. The groove includes a first sub-groove and a second sub-groove that are stacked, and depths of the second vias are substantially equal to a depth of the second sub-groove.
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公开(公告)号:US11791347B2
公开(公告)日:2023-10-17
申请号:US17781850
申请日:2021-05-17
Applicant: BOE Technology Group Co., Ltd.
Inventor: Ming Yang , Zhenyu Zhang , Minghua Xuan , Feifei Wang , Xinhong Lu
IPC: G09G3/32 , G09G3/34 , H01L27/12 , H01L25/16 , G09G3/3258
CPC classification number: H01L27/124 , G09G3/32 , G09G3/3258 , G09G3/34 , G09G3/3413 , G09G3/3426 , H01L25/167 , G09G2320/0233 , G09G2320/0626
Abstract: A light-emitting substrate and a display device are provided. Each light-emitting unit includes a first voltage terminal. The first voltage line includes a first portion, a first connecting portion, and a second portion. The first portion is electrically connected with first voltage terminals of a first row to a Y-th row of light-emitting units in a corresponding column. An extension direction of a second portion of the first voltage line has an included angle with both the first direction and the second direction. The first connecting portion is at boundary of the Y-th row and a (Y+1)-th row of light-emitting units. The first transmission line is electrically connected with first voltage terminals of the (Y+1)-th row to an N-th row of light-emitting units in a corresponding column, and is electrically connected with the first connecting portion of the first voltage line corresponding to light-emitting units of a corresponding column.
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