公开(公告)号：US20190393034A1

公开(公告)日：2019-12-26

申请号：US16430136

申请日：2019-06-03

Applicant: Applied Materials, Inc.

Inventor： Eswaranand VENKATASUBRAMANIAN ,  Pramit MANNA ,  Abhijit B. MALLICK ,  Srinivas GANDIKOTA

IPC: H01L21/033 ,  H01J37/317 ,  H01L21/67 ,  H01L21/02 ,  H01L21/311

Abstract: Embodiments of the present disclosure generally relate to techniques for deposition of high-density films for patterning applications. In one embodiment, a method of processing a substrate is provided. The method includes depositing a carbon hardmask over a film stack formed on a substrate, wherein the substrate is positioned on an electrostatic chuck disposed in a process chamber, implanting ions into the carbon hardmask, wherein depositing the carbon hardmask and implanting ions into the carbon hardmask are performed in the same process chamber, and repeating depositing the carbon hardmask and implanting ions into the carbon hardmask in a cyclic fashion until a pre-determined thickness of the carbon hardmask is reached.

公开(公告)号：US20170110321A1

公开(公告)日：2017-04-20

申请号：US14961920

申请日：2015-12-08

Applicant: Applied Materials, Inc.

Inventor： Rui CHENG ,  Abhijit Basu MALLICK ,  Srinivas GANDIKOTA ,  Pramit MANNA

IPC: H01L21/225 ,  H01L29/167 ,  H01L21/02 ,  H01L29/66 ,  H01L21/324

CPC classification number: H01L21/2254 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/324 ,  H01L29/167 ,  H01L29/66795 ,  H01L29/66803

Abstract: Embodiments described herein generally relate to doping of three dimensional (3D) structures on a substrate. In one embodiment, a conformal dopant containing film may be deposited over the 3D structures. Suitable dopants that may be incorporated in the film may include boron, phosphorous, and other suitable dopants. The film may be subsequently annealed to diffuse the dopants into the 3D structures.

公开(公告)号：US20150206756A1

公开(公告)日：2015-07-23

申请号：US14553842

申请日：2014-11-25

Applicant: Applied Materials, Inc.

Inventor： Srinivas GANDIKOTA ,  Zhendong LIU ,  Jianxin LEI ,  Rajkumar JAKKARAJU

IPC: H01L21/28 ,  H01L21/285

CPC classification number: H01L21/28273 ,  H01L21/28061 ,  H01L21/285 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/76889 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/66477 ,  H01L29/78

Abstract: Semiconductor devices, methods and apparatus for forming the same are provided. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal silicon nitride film layer on the conductive film layer, and a tungsten film layer on the refractory metal silicon nitride film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal silicon nitride film layer on the conductive film layer and depositing a tungsten film layer on the refractory metal silicon nitride film layer.

Abstract translation: 提供了用于形成半导体器件的方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极电介质层上的导电膜层，导电膜层上的难熔金属氮化硅膜层和难熔金属氮化硅膜层上的钨膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化硅膜层，并在难熔金属氮化硅膜层上沉积钨膜层。

公开(公告)号：US20240266163A1

公开(公告)日：2024-08-08

申请号：US18606621

申请日：2024-03-15

Applicant: Applied Materials, Inc.

Inventor： Srinivas GANDIKOTA ,  Yixiong YANG ,  Jacqueline Samantha WRENCH ,  Yong YANG ,  Steven C. H. HUNG

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/67

CPC classification number: H01L21/02247 ,  H01L21/02043 ,  H01L21/02274 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/67023 ,  H01L21/67207

Abstract: A method of forming a high-κ dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-κ dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-κ dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-κ dielectric cap layer, and removing the sacrificial silicon cap layer.

公开(公告)号：US20220262629A1

公开(公告)日：2022-08-18

申请号：US17729643

申请日：2022-04-26

Applicant: Applied Materials, Inc.

Inventor： Srinivas GANDIKOTA ,  Yixiong YANG ,  Jacqueline Samantha WRENCH ,  Yong YANG ,  Steven C. H. HUNG

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/67

Abstract: A method of forming a high-κ dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-κ dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-κ dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-κ dielectric cap layer, and removing the sacrificial silicon cap layer.

公开(公告)号：US20220108916A1

公开(公告)日：2022-04-07

申请号：US17490530

申请日：2021-09-30

Applicant: Applied Materials, Inc.

Inventor： Yixiong YANG ,  Seshadri GANGULI ,  Srinivas GANDIKOTA ,  Yong YANG ,  Jacqueline S. WRENCH ,  Luping LI

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/477

Abstract: A method of forming a contact structure in a semiconductor device having a feature includes forming a barrier layer in the feature, wherein the barrier layer is TiN; and forming a metal layer in the feature and over the barrier layer, wherein the metal layer is at least one of aluminum (Al), ruthenium (Ru), or molybdenum (Mo).

公开(公告)号：US20180068890A1

公开(公告)日：2018-03-08

申请号：US15811647

申请日：2017-11-13

Applicant: Applied Materials, Inc.

Inventor： Bhushan N. ZOPE ,  Avgerinos V. GELATOS ,  Bo ZHENG ,  Yu LEI ,  Xinyu FU ,  Srinivas GANDIKOTA ,  Sang-Ho YU ,  Mathew ABRAHAM

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01L21/48 ,  H01L21/285 ,  H01L29/66

CPC classification number: H01L21/76879 ,  H01L21/02057 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/4846 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53209 ,  H01L23/5329 ,  H01L29/66621

Abstract: Methods for depositing a contact metal layer in contact structures of a semiconductor device are provided. In one embodiment, a method for depositing a contact metal layer for forming a contact structure in a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a contact metal layer on a substrate and annealing the contact metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the contact metal layer on the substrate, exposing the portion of the contact metal layer to a plasma treatment process, and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the contact metal layer to a plasma treatment process until a predetermined thickness of the contact metal layer is achieved.

公开(公告)号：US20160312360A1

公开(公告)日：2016-10-27

申请号：US14734838

申请日：2015-06-09

Applicant: APPLIED MATERIALS, INC.

Inventor： Muhammad M. RASHEED ,  Srinivas GANDIKOTA ,  Mario Dan SANCHEZ ,  Guoqiang JIAN ,  Yixiong YANG ,  Deepak JADHAV ,  Ashutosh AGARWAL

IPC: C23C16/455 ,  C23C16/44

CPC classification number: C23C16/45544 ,  C23C16/4405 ,  C23C16/4408 ,  C23C16/4412 ,  C23C16/452 ,  C23C16/45502 ,  C23C16/45536 ,  C23C16/45565 ,  C23C16/45591 ,  H01J37/32357 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32834

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a substrate processing chamber includes: a chamber body; a chamber lid assembly having a housing enclosing a central channel that extends along a central axis and has an upper portion and a lower portion; a lid plate coupled to the housing and having a contoured bottom surface that extends downwardly and outwardly from a central opening coupled to the lower portion of the central channel to a peripheral portion of the lid plate; and a gas distribution plate disposed below the lid plate and having a plurality of apertures disposed through the gas distribution plate.

Abstract translation: 本文提供了用于处理衬底的方法和设备。 在一些实施例中，衬底处理室包括：腔体; 腔室盖组件，其具有围绕中心通道的壳体，所述中心通道沿着中心轴线延伸并具有上部和下部; 盖板，其联接到壳体并且具有轮廓的底表面，其从耦合到中心通道的下部的中心开口向下和向外延伸到盖板的周边部分; 以及配置在所述盖板的下方并具有贯穿所述气体分配板的多个孔的气体分配板。

公开(公告)号：US20160276214A1

公开(公告)日：2016-09-22

申请号：US14717740

申请日：2015-05-20

Applicant: APPLIED MATERIALS, INC.

Inventor： Xinyu FU ,  Srinivas GANDIKOTA ,  Mei CHANG ,  Seshadri GANGULI ,  Guoqiang JIAN ,  Yixiong YANG ,  Vikash BANTHIA ,  Jonathan BAKKE

IPC: H01L21/768

CPC classification number: H01L21/76816 ,  H01L21/32135 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76879

Abstract: Methods for etching a substrate are provided herein. In some embodiments, a method for etching a substrate disposed within a processing volume of a process chamber includes: (a) exposing a first layer disposed atop the substrate to a first gas comprising tungsten chloride (WCIx) for a first period of time and at a first pressure, wherein x is 5 or 6; (b) purging the processing volume of the first gas using an inert gas for a second period of time; (c) exposing the substrate to a hydrogen-containing gas for a third period of time to etch the first layer after purging the processing volume of the first gas; and (d) purging the processing volume of the hydrogen-containing gas using the inert gas for a fourth period of time.

Abstract translation: 本发明提供蚀刻基板的方法。 在一些实施例中，用于蚀刻设置在处理室的处理体积内的衬底的方法包括：（a）将设置在衬底顶部的第一层暴露于包含氯化钨（WCIx）的第一气体第一时间段 第一压力，其中x为5或6; （b）使用惰性气体吹扫第一气体的处理量第二段; （c）在清洗第一气体的处理容积之后，将衬底暴露于含氢气体持续第三时间以蚀刻第一层; 和（d）使用惰性气体净化含氢气体的处理量第四个时间段。

公开(公告)号：US20160247718A1

公开(公告)日：2016-08-25

申请号：US15145578

申请日：2016-05-03

Applicant: Applied Materials, Inc.

Inventor： Bhushan N. ZOPE ,  Avgerinos V. GELATOS ,  Bo ZHENG ,  Yu LEI ,  Xinyu FU ,  Srinivas GANDIKOTA ,  Sang-ho YU ,  Mathew ABRAHAM

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02

CPC classification number: H01L21/76879 ,  H01L21/02057 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/4846 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53209 ,  H01L23/5329 ,  H01L29/66621

Abstract: Methods for depositing a contact metal layer in contact structures of a semiconductor device are provided. In one embodiment, a method for depositing a contact metal layer for forming a contact structure in a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a contact metal layer on a substrate and annealing the contact metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the contact metal layer on the substrate, exposing the portion of the contact metal layer to a plasma treatment process, and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the contact metal layer to a plasma treatment process until a predetermined thickness of the contact metal layer is achieved.