METHODS FOR PATTERNING SUBSTRATES TO ADJUST VOLTAGE PROPERTIES

    公开(公告)号:US20230377901A1

    公开(公告)日:2023-11-23

    申请号:US18139382

    申请日:2023-04-26

    CPC classification number: H01L21/3115 H01L21/31144 H01L21/31111

    Abstract: A method of forming a structure on a substrate is provided. The method includes depositing a dipole dopant containing (DDC) layer including a dipole dopant on a first and second region of a dielectric layer (DL) of the substrate. A hardmask (HM) is deposited over the DDC deposited on the first and the second regions. A patterned photoresist layer (PR) is formed over the HM. The PR includes a first portion that is positioned over the first region and an opening that is positioned to expose a portion of the HM that is disposed over the second region of the substrate. The HM and DDC within the second region are etched and at least a portion of the DL is exposed within the second region. The PR is removed and the substrate is annealed to diffuse the dipole dopant into a portion of the DL disposed in the first region.

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