公开(公告)号：US12131181B2

公开(公告)日：2024-10-29

申请号：US17511994

申请日：2021-10-27

申请人： Red Hat, Inc.

发明人： Arie Bregman ,  Steve Mattar

IPC分类号： G06F9/48 ,  G06F9/455 ,  G06F9/50 ,  G06F9/54

CPC分类号： G06F9/485 ,  G06F9/455 ,  G06F9/45558 ,  G06F9/48 ,  G06F9/4806 ,  G06F9/4843 ,  G06F9/4881 ,  G06F9/50 ,  G06F9/5077 ,  G06F9/5088 ,  G06F9/54 ,  G06F2009/45562 ,  G06F2009/45575 ,  G06F2009/45591

摘要： The removal of software operators can be managed according to some aspects described herein. In one example, a system can receive a command to remove an operator from a computing cluster and, in response, determine a set of actions previously performed in the computing cluster in relation to adding the operator to the computing cluster. Each action can involve the creation, modification, or deletion of at least one object in the computing cluster. The system can also determine a particular order in which the set of actions were previously performed relative to one another. The system can then assist with removing the operator from the computing cluster by causing an inverse of each action in the set of actions to be performed in the computing cluster in a reverse order to the particular order.

公开(公告)号：US20240346016A1

公开(公告)日：2024-10-17

申请号：US18648679

申请日：2024-04-29

申请人： Bank of America Corporation

发明人： Rama Venkata S. Kavali ,  Venugopala Rao Randhi ,  Pitti Venkateswarlu ,  Jyothi Gaddam

IPC分类号： G06F16/23 ,  G06F9/48 ,  G06F9/50 ,  G06F16/21 ,  G06N10/40 ,  G06N10/60

CPC分类号： G06F16/2386 ,  G06F9/4843 ,  G06F9/5077 ,  G06F16/21 ,  G06F16/2365 ,  G06N10/40 ,  G06N10/60 ,  G06F2209/501 ,  G06F2209/5019

摘要： A quantum computing platform may establish a smart contract approval and management model, including: rules for automated validation, and rules for smart contract approver validation. The computing platform may receive, from a workload processing system, a data feed indicating current workload information. The computing platform may generate, based on the data feed, a first container configuration output, defining a batch configuration for use in processing the data feed. The computing platform may validate, using the one or more rules for automated validation, the first container configuration output. The computing platform may send, to the workload processing system, the first container configuration output and one or more commands directing the workload processing system to process the data feed using the batch configuration defined by the first container configuration output, which may cause the workload processing system to process the data feed using the batch configuration.

公开(公告)号：US12099739B2

公开(公告)日：2024-09-24

申请号：US16940442

申请日：2020-07-28

申请人： International Business Machines Corporation

发明人： Xi Bo Zhu ,  Xiao Xiao Pei ,  Shi Yu Wang ,  Qin Li ,  Lu Zhao

IPC分类号： G06F3/06 ,  G06F9/48

CPC分类号： G06F3/0647 ,  G06F3/0619 ,  G06F3/0673 ,  G06F9/4843

摘要： Embodiments of the present disclosure relate to a method, system and computer program product for trace data protection. In some embodiments, a method is disclosed. According to the method, a target task is determined from a plurality of tasks, where trace data of the target task is to be protected. The trace data of the target task is transferred from a first area to a second area of a memory. Existing trace data in the second area is offloaded to a storage device before being overwritten. In other embodiments, a system and a computer program product are disclosed.

公开(公告)号：US12099378B2

公开(公告)日：2024-09-24

申请号：US17963129

申请日：2022-10-10

申请人： QUALCOMM Incorporated

发明人： Edwin Jose ,  Ravi Jenkal ,  Donghyun Kim

IPC分类号： G06F1/08 ,  G06F1/3206 ,  G06F9/38 ,  G06F9/48

CPC分类号： G06F1/08 ,  G06F1/3206 ,  G06F9/3877 ,  G06F9/4837 ,  G06F9/4843

摘要： Computer processing unit intra-frame clock and voltage scaling based on graphics application awareness is disclosed. The computer processing unit includes a processor configured to execute a graphics application to generate a graphics image for output to a display. The computer processing unit includes a power management circuit configured to perform clock and voltage scaling (CVS) (i.e., frequency and/or voltage scaling) for the processor. The power management circuit is configured to identify a graphics application dispatched to be executed or being executed by the processor and to set the operating point for the processor based on the identified graphics application. This may allow the processor to operate at a more optimal operating point for performance of graphics and non-graphics applications as opposed to operating each application at a lower operating point due to a graphics application that is more current intensive.

公开(公告)号：US12093504B2

公开(公告)日：2024-09-17

申请号：US17863823

申请日：2022-07-13

申请人： PANTECH CORPORATION

发明人： Seul Ki Choi ,  Sang Jin Yoon

IPC分类号： G06F9/48 ,  G06F3/0346 ,  G06F3/048 ,  G06F3/0481 ,  G06F3/04812 ,  G06F3/04817 ,  G06F3/0482 ,  G06F3/04842 ,  G06F3/16 ,  G06F9/44 ,  G06F9/451

CPC分类号： G06F3/04817 ,  G06F3/0346 ,  G06F3/048 ,  G06F3/0481 ,  G06F3/04812 ,  G06F3/0482 ,  G06F3/04842 ,  G06F3/162 ,  G06F3/167 ,  G06F9/451 ,  G06F9/48 ,  G06F9/4806 ,  G06F9/4843 ,  G06F9/485 ,  G06F9/4881

摘要： Provided is a method for controlling a plurality of work processes in a multitasking mobile terminal, and more particularly, a method for selecting a second work process during a first work process and controlling a predetermined function of the selected second work process. In the controlling method, icons corresponding to the respective work processes are displayed in response to a user command, and a desired work process is selected through the displayed icons. A predetermined function of the selected work process is controlled through a pop-up menu activated in response to the user command.

公开(公告)号：US12086649B2

公开(公告)日：2024-09-10

申请号：US17356258

申请日：2021-06-23

申请人： PURE STORAGE, INC.

发明人： Prakash Darji ,  Shvetima Gulati

IPC分类号： G06F9/50 ,  G06F3/06 ,  G06F9/455 ,  G06F9/48 ,  G06F21/60 ,  H04L43/065 ,  H04L43/0817 ,  H04L67/1097 ,  H04L67/75 ,  H04L12/46

CPC分类号： G06F9/5088 ,  G06F3/0604 ,  G06F3/0605 ,  G06F3/0622 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/067 ,  G06F9/455 ,  G06F9/45558 ,  G06F9/48 ,  G06F9/4806 ,  G06F9/4843 ,  G06F9/485 ,  G06F9/4856 ,  G06F9/4881 ,  G06F9/50 ,  G06F9/5005 ,  G06F9/5016 ,  G06F9/5083 ,  G06F21/604 ,  H04L43/065 ,  H04L43/0817 ,  H04L67/1097 ,  H04L67/75 ,  G06F2009/4557 ,  G06F9/5044 ,  H04L12/46

摘要： Rebalancing in a fleet of storage systems using data science including generating, by the cloud-based rebalancing system, a plurality of workload migration scenarios to address a detected workload imbalance among a plurality of workloads in a fleet of storage systems; determining, by the cloud-based rebalancing system, a plurality of movement vectors for each workload migration scenario, wherein each of the plurality of movement vectors describes a consideration factor for migrating a workload of the plurality of workloads within the fleet of storage systems; and generating, by the cloud-based rebalancing system, at least one rebalancing proposal based on the plurality of movement vectors for each workload migration scenario.

公开(公告)号：US12073310B2

公开(公告)日：2024-08-27

申请号：US16837171

申请日：2020-04-01

申请人： Microsoft Technology Licensing, LLC

发明人： Stephen Sangho Youn ,  Lok Chand Koppaka ,  Steven Karl Reinhardt

IPC分类号： G06N3/063 ,  G06F9/38 ,  G06F9/48 ,  G06F9/50 ,  G06F17/16

CPC分类号： G06N3/063 ,  G06F9/3836 ,  G06F9/3887 ,  G06F9/4843 ,  G06F9/5027 ,  G06F17/16

摘要： Deep neural network accelerators (DNNs) with independent datapaths for simultaneous processing of different classes of operations and related methods are described. An example DNN accelerator includes an instruction dispatcher for receiving chains of instructions having both instructions for performing a first class of operations and a second class of operations corresponding to a neural network model. The DNN accelerator further includes a first datapath and a second datapath, where each is configured to execute at least one instruction chain locally before outputting any results. The instruction dispatcher is configured to forward instructions for performing the first class of operations to the first datapath and forward instructions for performing the second class of operations to the second datapath to overlap in time a performance of at least a subset of the first class of operations with a performance of at least a subset of the second class of operations.

公开(公告)号：US12067427B2

公开(公告)日：2024-08-20

申请号：US17868391

申请日：2022-07-19

申请人： Intel Corporation

发明人： Eliezer Tamir ,  Johannes Berg ,  Andrew Cunningham ,  Peter Waskiewicz, Jr. ,  Andrey Chilikin

IPC分类号： G06F9/50 ,  G06F9/4401 ,  G06F9/48 ,  H04L9/40 ,  H04L45/74 ,  H04L47/10 ,  H04L49/00 ,  H04L69/22

CPC分类号： G06F9/5088 ,  G06F9/4411 ,  G06F9/4843 ,  G06F9/5027 ,  G06F9/5044 ,  H04L45/74 ,  H04L47/23 ,  H04L49/30 ,  H04L63/0209 ,  H04L63/0236 ,  H04L63/0245 ,  H04L69/22 ,  G06F2209/509

摘要： Examples include registering a device driver with an operating system, including registering available hardware offloads. The operating system receives a call to a hardware offload, inserts a binary filter representing the hardware offload into a hardware component and causes the execution of the binary filter by the hardware component when the hardware offload is available, and executes the binary filter in software when the hardware offload is not available.

公开(公告)号：US12045649B1

公开(公告)日：2024-07-23

申请号：US18142670

申请日：2023-05-03

申请人： Strategic Coach

发明人： Barbara Sue Smith ,  Daniel J. Sullivan

IPC分类号： G06F9/48 ,  G06F9/50 ,  G06N3/049

CPC分类号： G06F9/4887 ,  G06F9/48 ,  G06F9/4806 ,  G06F9/4843 ,  G06F9/485 ,  G06F9/4856 ,  G06F9/4881 ,  G06F9/50 ,  G06F9/5005 ,  G06F9/5027 ,  G06F9/5038 ,  G06F9/5083 ,  G06F9/5088 ,  G06N3/049

摘要： An apparatus and method. The apparatus including at least a processor configured to identify a plurality of tasks associated with a first resource, determine at least an assignable task of the plurality of tasks and reallocate the at least an assignable task that includes: identifying a plurality of second resources, wherein each resource includes an efficiency index corresponding to the at least an assignable task and a temporal attribute, generating an optimal reallocation as a function of the efficiency index and the temporal attribute and reallocating the at least an assignable task as a function of the optimal reallocation.

公开(公告)号：US20240241761A1

公开(公告)日：2024-07-18

申请号：US18618901

申请日：2024-03-27

申请人： Intel Corporation

发明人： Mohan J. Kumar ,  Murugasamy K. Nachimuthu ,  Krishna Bhuyan

IPC分类号： G06F9/50 ,  G06F3/06 ,  G06F7/06 ,  G06F8/65 ,  G06F8/654 ,  G06F8/656 ,  G06F8/658 ,  G06F9/38 ,  G06F9/4401 ,  G06F9/455 ,  G06F9/48 ,  G06F9/54 ,  G06F11/07 ,  G06F11/30 ,  G06F11/34 ,  G06F12/02 ,  G06F12/06 ,  G06F13/16 ,  G06F16/174 ,  G06F21/57 ,  G06F21/62 ,  G06F21/73 ,  G06F21/76 ,  G06T1/20 ,  G06T1/60 ,  G06T9/00 ,  H01R13/453 ,  H01R13/631 ,  H03K19/173 ,  H03M7/30 ,  H03M7/40 ,  H03M7/42 ,  H04L9/08 ,  H04L12/28 ,  H04L12/46 ,  H04L41/044 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L43/04 ,  H04L43/06 ,  H04L43/08 ,  H04L43/0894 ,  H04L47/20 ,  H04L47/2441 ,  H04L49/104 ,  H04L61/5007 ,  H04L67/10 ,  H04L67/1014 ,  H04L67/63 ,  H04L67/75 ,  H05K7/14 ,  G06F11/14 ,  G06F15/80 ,  G06F16/28 ,  H04L9/40 ,  H04L41/046 ,  H04L41/0896 ,  H04L41/142 ,  H04L47/78 ,  H04Q11/00

CPC分类号： G06F9/505 ,  G06F3/0604 ,  G06F3/0608 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/0641 ,  G06F3/0647 ,  G06F3/065 ,  G06F3/0653 ,  G06F3/067 ,  G06F7/06 ,  G06F8/65 ,  G06F8/654 ,  G06F8/656 ,  G06F8/658 ,  G06F9/3851 ,  G06F9/3891 ,  G06F9/4401 ,  G06F9/45533 ,  G06F9/4843 ,  G06F9/4881 ,  G06F9/5005 ,  G06F9/5038 ,  G06F9/5044 ,  G06F9/5083 ,  G06F9/544 ,  G06F11/0709 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/3006 ,  G06F11/3034 ,  G06F11/3055 ,  G06F11/3079 ,  G06F11/3409 ,  G06F12/0284 ,  G06F12/0692 ,  G06F13/1652 ,  G06F16/1744 ,  G06F21/57 ,  G06F21/6218 ,  G06F21/73 ,  G06F21/76 ,  G06T1/20 ,  G06T1/60 ,  G06T9/005 ,  H01R13/453 ,  H01R13/4536 ,  H01R13/4538 ,  H01R13/631 ,  H03K19/1731 ,  H03M7/3084 ,  H03M7/40 ,  H03M7/42 ,  H03M7/60 ,  H03M7/6011 ,  H03M7/6017 ,  H03M7/6029 ,  H04L9/0822 ,  H04L12/2881 ,  H04L12/4633 ,  H04L41/044 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L43/04 ,  H04L43/06 ,  H04L43/08 ,  H04L43/0894 ,  H04L47/20 ,  H04L47/2441 ,  H04L49/104 ,  H04L61/5007 ,  H04L67/10 ,  H04L67/1014 ,  H04L67/63 ,  H04L67/75 ,  H05K7/1452 ,  H05K7/1487 ,  H05K7/1491 ,  G06F11/1453 ,  G06F12/023 ,  G06F15/80 ,  G06F16/285 ,  G06F2212/401 ,  G06F2212/402 ,  G06F2221/2107 ,  H04L41/046 ,  H04L41/0896 ,  H04L41/142 ,  H04L47/78 ,  H04L63/1425 ,  H04Q11/0005 ,  H05K7/1447 ,  H05K7/1492

摘要： Technologies for composing a managed node with multiple processors on multiple compute sleds to cooperatively execute a workload include a memory, one or more processors connected to the memory, and an accelerator. The accelerator further includes a coherence logic unit that is configured to receive a node configuration request to execute a workload. The node configuration request identifies the compute sled and a second compute sled to be included in a managed node. The coherence logic unit is further configured to modify a portion of local working data associated with the workload on the compute sled in the memory with the one or more processors of the compute sled, determine coherence data indicative of the modification made by the one or more processors of the compute sled to the local working data in the memory, and send the coherence data to the second compute sled of the managed node.