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公开(公告)号:US20200013897A1
公开(公告)日:2020-01-09
申请号:US16451787
申请日:2019-06-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JONG HO PARK , Wan Don KIM , Weon Hong KIM , Hyeon Jun BAEK , Byoung Hoon LEE , Jeong Hyuk YIM , Sang Jin HYUN
IPC: H01L29/78 , H01L27/088 , H01L29/51 , H01L29/49
Abstract: A semiconductor device including: a first transistor which include a first gate stack on a substrate; and a second transistor which includes a second gate stack on the substrate, wherein the first gate stack includes a first ferroelectric material layer disposed on the substrate, a first work function layer disposed on the first ferroelectric material layer and a first upper gate electrode disposed on the first work function layer, wherein the second gate stack. includes a second ferroelectric material layer disposed on the substrate, a second work function layer disposed on the second ferroelectric material layer and a second upper gate electrode disposed on the second work function layer, wherein the first work function layer includes the same material as the second work function layer, and wherein an effective work function of the first gate stack is different from an effective work function of the second gate stack.
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公开(公告)号:US20180261677A1
公开(公告)日:2018-09-13
申请号:US15653588
申请日:2017-07-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byoung Hoon LEE , Hyeon Jin KIM , Hoon Joo NA , Sung In SUH , Chan Hyeong LEE , Hu Yong LEE , Seong Hoon JEONG , Sang Jin HYUN
IPC: H01L29/49 , H01L29/78 , H01L27/092 , H01L21/28
Abstract: A semiconductor device includes a gate insulating layer disposed on a substrate, a first work function tuning layer disposed on the gate insulating layer, a lower barrier conductive layer on and in contact with the first work function tuning layer, and an upper barrier conductive layer on and in contact with the lower barrier conductive layer. The upper barrier conductive layer and the lower barrier conductive layer include a material in common, e.g., they may each include a titanium nitride (TiN) layer.
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公开(公告)号:US20210119058A1
公开(公告)日:2021-04-22
申请号:US17114598
申请日:2020-12-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jong Ho PARK , Wan Don KIM , Weon Hong KIM , Hyeon Jun BAEK , Byoung Hoon LEE , Jeong Hyuk YIM , Sang Jin HYUN
IPC: H01L29/78 , H01L29/49 , H01L29/51 , H01L27/088
Abstract: A semiconductor device including: a first transistor which include a first gate stack on a substrate; and a second transistor which includes a second gate stack on the substrate, wherein the first gate stack includes a first ferroelectric material layer disposed on the substrate, a first work function layer disposed on the first ferroelectric material layer and a first upper gate electrode disposed on the first work function layer, wherein the second gate stack includes a second ferroelectric material layer disposed on the substrate, a second work function layer disposed on the second ferroelectric material layer and a second upper gate electrode disposed on the second work function layer, wherein the first work function layer includes the same material as the second work function layer, and wherein an effective work function of the first gate stack is different from an effective work function of the second gate stack.
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公开(公告)号:US20180350983A1
公开(公告)日:2018-12-06
申请号:US16100804
申请日:2018-08-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won Keun CHUNG , Jong Ho PARK , Seung Ha OH , Sang Yong KIM , Hoon Joo NA , Sang Jin HYUN
IPC: H01L29/78 , H01L29/66 , H01L29/423 , H01L29/51 , H01L21/324 , H01L29/06 , H01L21/283
CPC classification number: H01L29/7831 , B82Y10/00 , H01L21/283 , H01L21/324 , H01L29/0653 , H01L29/0673 , H01L29/0676 , H01L29/42356 , H01L29/42364 , H01L29/42392 , H01L29/4908 , H01L29/511 , H01L29/513 , H01L29/66439 , H01L29/66484 , H01L29/66666 , H01L29/775 , H01L29/7827 , H01L29/78696
Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes first and second gate stack structures formed in first and second regions, respectively, wherein the first gate stack structure is formed adjacent a first channel region and comprises a first gate insulating film having a first thickness formed on the first channel region, a first function film having a second thickness formed on the first gate insulating film and a first filling film having a third thickness formed on the first function film, wherein the second gate stack structure is formed adjacent a second channel region and comprises a second gate insulating film having the first thickness formed on the second channel region, a second function film having the second thickness formed on the second gate insulating film and a second filling film having the third thickness formed on the second function film, wherein the first and second function films, respectively, comprise TiN and Si concentrations that are different from each other.
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公开(公告)号:US20180068889A1
公开(公告)日:2018-03-08
申请号:US15624783
申请日:2017-06-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junghun CHOI , Jeong Ik KIM , Myung YANG , Chul Sung KIM , Sang Jin HYUN
IPC: H01L21/768 , H01L23/528 , H01L23/535
CPC classification number: H01L21/76862 , H01L21/76805 , H01L21/76816 , H01L21/76843 , H01L21/76876 , H01L21/76895 , H01L23/485 , H01L23/528 , H01L23/53209 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L23/535
Abstract: A semiconductor device and a method of manufacturing the same, the semiconductor device including a substrate; an insulating layer on the substrate, the insulating layer including a first trench and a second trench therein, the second trench having an aspect ratio that is smaller than an aspect ratio of the first trench; a barrier layer in the first trench and the second trench; a seed layer on the barrier layer in the first trench and the second trench; a first bulk layer on the seed layer and filled in the first trench; and a second bulk layer on the seed layer and filled in the second trench, wherein an average grain size of the second bulk layer is larger than an average grain size of the first bulk layer.
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公开(公告)号:US20220199790A1
公开(公告)日:2022-06-23
申请号:US17694759
申请日:2022-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heon Bok LEE , Dae Yong KIM , Wan Don Kim , Jeong Hyuk YIM , Won Keun CHUNG , Hyo Seok CHOI , Sang Jin HYUN
IPC: H01L29/417 , H01L29/66 , H01L29/08 , H01L21/768 , H01L29/78
Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction, a gate electrode on the active pattern, the gate electrode extending in a second direction intersecting the first direction and including a first portion and a second portion arranged along the second direction, a first contact plug on the gate electrode, the first contact plug being connected to a top surface of the second portion of the gate electrode, a source/drain region in the active pattern on a sidewall of the gate electrode, and a source/drain contact on the source/drain region, a height of a top surface of the source/drain contact being higher than a top surface of the first portion of the gate electrode and lower than the top surface of the second portion of the gate electrode.
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公开(公告)号:US20200075399A1
公开(公告)日:2020-03-05
申请号:US16386704
申请日:2019-04-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung Soo KIM , Chae Ho NA , Gyu Hwan AHN , Dong Hyun ROH , Sang Jin HYUN
IPC: H01L21/762 , H01L29/66 , H01L27/088
Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.
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公开(公告)号:US20190097048A1
公开(公告)日:2019-03-28
申请号:US15974775
申请日:2018-05-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae Yeol SONG , Su Young BAE , Dong Soo LEE , Hyung Suk JUNG , Sang Jin HYUN
IPC: H01L29/78 , H01L29/66 , H01L29/51 , H01L21/8234 , H01L29/423
Abstract: A semiconductor device including a substrate; a first and second active region on the substrate; a first recess intersecting with the first active region; a second recess intersecting with the second active region; a gate spacer extending along sidewalls of the first and second recess; a first lower high-k dielectric film in the first recess and including a first high-k dielectric material in a first concentration and a second high-k dielectric material; a second lower high-k dielectric film in the second recess and including the first high-k dielectric material in a second concentration that is greater than the first concentration, and the second high-k dielectric material; a first metal-containing film on the first lower high-k dielectric film and including silicon in a third concentration; and a second metal-containing film on the second lower high-k dielectric film and including silicon in a fourth concentration that is smaller than the third concentration.
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公开(公告)号:US20180261460A1
公开(公告)日:2018-09-13
申请号:US15825135
申请日:2017-11-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yoon Tae HWANG , Moon Kyun SONG , Nam Gyu CHO , Kyu Min LEE , Soo Jung CHOI , Yong Ho HA , Sang Jin HYUN
Abstract: Semiconductor devices and methods for fabricating the same are provided. A semiconductor device may include a substrate including first and second regions, a first interface film disposed on the substrate in the first region, a second interface film disposed on the substrate in the second region, a dielectric film disposed on the first and second interface films, a first metal film disposed on the dielectric film in the first region, and a second metal film disposed on the dielectric film in the second region. The first and second interface films may comprise an oxide of the substrate, the first and second metal films may comprise different materials, and the first and second interface films may have different thicknesses. Channels may be provided in the first and second regions, and the channels may be fin-shaped or wire-shaped. The metal films may have different oxygen content.
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公开(公告)号:US20240063276A1
公开(公告)日:2024-02-22
申请号:US18380754
申请日:2023-10-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heon Bok LEE , Dae Yong KIM , Wan Don KIM , Jeong Hyuk YIM , Won Keun CHUNG , Hyo Seok CHOI , Sang Jin HYUN
IPC: H01L29/417 , H01L29/66 , H01L29/08 , H01L21/768 , H01L29/78
CPC classification number: H01L29/41775 , H01L29/6681 , H01L29/0847 , H01L21/76897 , H01L29/41791 , H01L29/7851
Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction, a gate electrode on the active pattern, the gate electrode extending in a second direction intersecting the first direction and including a first portion and a second portion arranged along the second direction, a first contact plug on the gate electrode, the first contact plug being connected to a top surface of the second portion of the gate electrode, a source/drain region in the active pattern on a sidewall of the gate electrode, and a source/drain contact on the source/drain region, a height of a top surface of the source/drain contact being higher than a top surface of the first portion of the gate electrode and lower than the top surface of the second portion of the gate electrode.
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