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    SEMICONDUCTOR MEMORY DEVICE
    1.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240357810A1

    公开(公告)日：2024-10-24

    申请号：US18757708

    申请日：2024-06-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan LEE ,  Yong Seok KIM ,  Il Gweon KIM ,  Hyun Cheol KIM ,  Hyeoung Won SEO ,  Sung Won YOO ,  Jae Ho HONG

    IPC: H10B43/20 ,  H10B43/10

    CPC classification number: H10B43/20 ,  H10B43/10

    Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210249397A1

    公开(公告)日：2021-08-12

    申请号：US17245299

    申请日：2021-04-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kohji KANAMORI ,  Hyun Mog PARK ,  Yong Seok KIM ,  Kyung Hwan LEE ,  Jun Hee LIM ,  Jee Hoon HAN

    IPC: H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582

    Abstract: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.

    SEMICONDUCTOR DEVICE INCLUDING DATA STORAGE STRUCTURE
    3.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING DATA STORAGE STRUCTURE 有权

    公开(公告)号：US20210074914A1

    公开(公告)日：2021-03-11

    申请号：US16592041

    申请日：2019-10-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyung Hwan LEE ,  Yong Seok KIM ,  Tae Hun KIM ,  Seok Han PARK ,  Satoru YAMADA ,  Jae Ho HONG

    IPC: H01L45/00 ,  H01L27/24

    Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including alternating gate electrodes and insulating layers stacked along a first direction, a vertical opening through the stack structure along the first direction, the vertical opening including a channel structure having a semiconductor layer on an inner sidewall of the vertical opening, and a variable resistive material on the semiconductor layer, a vacancy concentration in the variable resistive material varies along its width to have a higher concentration closer to a center of the channel structure than to the semiconductor layer, and an impurity region on the substrate, the semiconductor layer contacting the impurity region at a bottom of the channel structure.

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230019055A1

    公开(公告)日：2023-01-19

    申请号：US17954844

    申请日：2022-09-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seok Han PARK ,  Yong Seok KIM ,  Hui-Jung KIM ,  Satoru YAMADA ,  Kyung Hwan LEE ,  Jae Ho HONG ,  Yoo Sang HWANG

    IPC: H01L27/11597 ,  H01L27/1159 ,  H01L49/02 ,  H01L29/78 ,  H01L29/45 ,  H01L29/786 ,  H01L29/06

    Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THEREOF
    5.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THEREOF 有权

    公开(公告)号：US20210335798A1

    公开(公告)日：2021-10-28

    申请号：US17227793

    申请日：2021-04-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan LEE ,  Yong Seok KIM ,  Hyun Cheol KIM ,  Satoru YAMADA ,  Sung Won YOO ,  Jae Ho HONG

    IPC: H01L27/1156 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11548 ,  H01L27/11551

    Abstract: Provided is a semiconductor memory device. The semiconductor memory device comprises a first semiconductor pattern including a first impurity region, a second impurity region, and a channel region, the first impurity region spaced apart from a substrate in a first direction and having a first conductivity type, the second impurity region having a second conductivity type different from the first conductivity type, and the channel region between the first impurity region and the second impurity region, a first conductive connection line connected to the first impurity region and extending in a second direction different from the first direction and a first gate structure extending in the first direction and including a first gate electrode and a first gate insulating film, wherein the first gate electrode penetrates the channel region and the first gate insulating film is between the first gate electrode and the semiconductor pattern.

    SEMICONDUCTOR MEMORY DEVICE
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20220139948A1

    公开(公告)日：2022-05-05

    申请号：US17377848

    申请日：2021-07-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan LEE ,  Yong Seok KIM ,  Il Gweon KIM ,  Hyun Cheol KIM ,  Hyeoung Won SEO ,  Sung Won YOO ,  Jae Ho HONG

    IPC: H01L27/11578 ,  H01L27/11565

    Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

    SEMICONDUCTOR MEMORY DEVICE
    10.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20220157887A1

    公开(公告)日：2022-05-19

    申请号：US17380331

    申请日：2021-07-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyung Hwan LEE ,  Kwang Seok KIM ,  Yong Seok KIM ,  Il Gweon KIM ,  Kil Ho LEE

    IPC: H01L27/22 ,  G11C11/16

    Abstract: A three-dimensional semiconductor memory device is provided. The semiconductor memory device includes first horizontal conductive lines on a substrate in a first direction, each of the first horizontal conductive lines extending in a second direction different from the first direction, second horizontal conductive lines stacked on the substrate in the first direction, each of the second horizontal conductive lines extending in the second direction, a vertical conductive line between the first horizontal conductive line and the second horizontal conductive line and extending in the first direction, a plurality of first magnetic tunnel junction patterns between the vertical conductive line and each of the first horizontal conductive lines, and a plurality of second magnetic tunnel junction patterns between the vertical conductive lines and each of the second horizontal conductive lines. The first horizontal conductive lines and the second horizontal conductive lines are spaced apart from each other in a third direction.

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