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    SEMICONDUCTOR DEVICE INCLUDING DATA STORAGE STRUCTURE
    2.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING DATA STORAGE STRUCTURE 有权

    公开(公告)号：US20210074914A1

    公开(公告)日：2021-03-11

    申请号：US16592041

    申请日：2019-10-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyung Hwan LEE ,  Yong Seok KIM ,  Tae Hun KIM ,  Seok Han PARK ,  Satoru YAMADA ,  Jae Ho HONG

    IPC: H01L45/00 ,  H01L27/24

    Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including alternating gate electrodes and insulating layers stacked along a first direction, a vertical opening through the stack structure along the first direction, the vertical opening including a channel structure having a semiconductor layer on an inner sidewall of the vertical opening, and a variable resistive material on the semiconductor layer, a vacancy concentration in the variable resistive material varies along its width to have a higher concentration closer to a center of the channel structure than to the semiconductor layer, and an impurity region on the substrate, the semiconductor layer contacting the impurity region at a bottom of the channel structure.

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210036020A1

    公开(公告)日：2021-02-04

    申请号：US16942093

    申请日：2020-07-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seok Han PARK ,  Yong Seok KIM ,  Hui-Jung KIM ,  Satoru YAMADA ,  Kyung Hwan LEE ,  Jae Ho HONG ,  Yoo Sang HWANG

    IPC: H01L27/11597 ,  H01L27/1159 ,  H01L49/02 ,  H01L29/06 ,  H01L29/45 ,  H01L29/786 ,  H01L29/78

    Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

    SEMICONDUCTOR MEMORY DEVICE
    6.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240334682A1

    公开(公告)日：2024-10-03

    申请号：US18522932

    申请日：2023-11-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Bo Won YOO ,  Seok Han PARK ,  Ki Seok LEE ,  Hyun Geun CHOI ,  Jin Woo HAN

    IPC: H10B12/00

    CPC classification number: H10B12/482 ,  H10B12/09 ,  H10B12/33 ,  H10B12/50

    Abstract: A semiconductor memory device with improved integration and electrical characteristics. The semiconductor memory device includes a peri-gate structure, a first peri-connecting structure on the peri-gate structure, a data storage pattern on the first peri-connecting structure, an active pattern that includes a first surface and a second surface opposite to each other in a first direction, and a first side wall and a second side wall opposite to each other in a second direction, the first surface of the active pattern connected to the data storage pattern and facing a substrate, a bit line on the active pattern, connected to the second surface of the active pattern, and extends in the second direction, a word line on the first side wall of the active pattern and extending in a third direction, a second peri-connecting structure connected to the bit line and a connecting pad connected to the second peri-connecting wiring.

    SEMICONDUCTOR MEMORY DEVICE
    7.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240315013A1

    公开(公告)日：2024-09-19

    申请号：US18406454

    申请日：2024-01-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun Geun CHOI ,  Seok Han PARK ,  Bo Won YOO ,  Ki Seok LEE ,  Jin Woo HAN

    IPC: H10B12/00 ,  H01L23/522 ,  H01L23/528

    CPC classification number: H10B12/482 ,  H01L23/5226 ,  H01L23/5283 ,  H10B12/315 ,  H10B12/488 ,  H10B12/50

    Abstract: A semiconductor memory device includes a peri-gate structure on a substrate, a first bonding pad on the peri-gate structure, a shielding conductive pattern on the first bonding pad, a second bonding pad between the shielding conductive pattern and the first bonding pad and contacting the first bonding pad, a bit line on the shielding conductive pattern extending in a first direction, an active pattern on the bit line and including a lower surface and an upper surface, and a first side wall and a second side wall opposite to each other in the first direction, the lower surface of the active pattern being connected to the bit line, a word line on the first side wall of the active pattern, and extends in a third direction, and a data storage pattern on the active pattern, and is connected to the upper surface of the active pattern.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
    8.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开

    公开(公告)号：US20230371243A1

    公开(公告)日：2023-11-16

    申请号：US18101613

    申请日：2023-01-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ki Seok LEE ,  Keun Nam KIM ,  Seok Han PARK

    IPC: H10B12/00

    CPC classification number: H10B12/482 ,  H10B12/05 ,  H10B12/315 ,  H10B12/488 ,  H10B12/50

    Abstract: A semiconductor memory device includes a peripheral gate structure disposed on a substrate, a bit line disposed on the peripheral gate structure and extending in a first direction, a shielding structure disposed adjacent to the bit line on the peripheral gate structure and extending in the first direction, a first word line disposed on the bit line and the shielding structure and extending in a second direction, a second word line disposed on the bit line and the shielding structure, extending in the second direction, and spaced apart from the first word line in the first direction, first and second active patterns disposed on the bit line and disposed between the first and second word lines, and contact patterns connected to the first and second active patterns.

    SEMICONDUCTOR DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230019055A1

    公开(公告)日：2023-01-19

    申请号：US17954844

    申请日：2022-09-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seok Han PARK ,  Yong Seok KIM ,  Hui-Jung KIM ,  Satoru YAMADA ,  Kyung Hwan LEE ,  Jae Ho HONG ,  Yoo Sang HWANG

    IPC: H01L27/11597 ,  H01L27/1159 ,  H01L49/02 ,  H01L29/78 ,  H01L29/45 ,  H01L29/786 ,  H01L29/06

    Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

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