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公开(公告)号：US20220139948A1
公开(公告)日：2022-05-05
申请号：US17377848
申请日：2021-07-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung Hwan LEE , Yong Seok KIM , Il Gweon KIM , Hyun Cheol KIM , Hyeoung Won SEO , Sung Won YOO , Jae Ho HONG
IPC: H01L27/11578 , H01L27/11565
Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.
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公开(公告)号：US20210036020A1
公开(公告)日：2021-02-04
申请号：US16942093
申请日：2020-07-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seok Han PARK , Yong Seok KIM , Hui-Jung KIM , Satoru YAMADA , Kyung Hwan LEE , Jae Ho HONG , Yoo Sang HWANG
IPC: H01L27/11597 , H01L27/1159 , H01L49/02 , H01L29/06 , H01L29/45 , H01L29/786 , H01L29/78
Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.
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Patent Agency Ranking
公开(公告)号：US20210319293A1
公开(公告)日：2021-10-14
申请号：US17224575
申请日：2021-04-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyung Hwan LEE , Yong Seok KIM , Hyun Cheol KIM , Satoru YAMADA , Sung Won YOO , Jae Ho HONG
Abstract: A neuromorphic device includes a synaptic array, including input lines extending in a first direction and receiving input signals independently from axon circuits connected thereto, bit lines extending in a second direction crossing the first direction and outputting output signals, cell strings that each include at least two resistive memristor elements and a string select transistor in series between an input line and a bit line, electrode pads stacked and spaced apart from each other between the input and bit lines and connected to the string select transistor and at least two resistive memristor elements, a decoder to apply a string selection signal or a word line selection signal to the electrode pads, and neuron circuits, each connected to one of the bit lines connected to one of the cell strings, summing the output signals, converting and outputting the summed signal when it is more than a predetermined threshold.
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公开(公告)号：US20240357810A1
公开(公告)日：2024-10-24
申请号：US18757708
申请日：2024-06-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung Hwan LEE , Yong Seok KIM , Il Gweon KIM , Hyun Cheol KIM , Hyeoung Won SEO , Sung Won YOO , Jae Ho HONG
Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.
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公开(公告)号：US20210074914A1
公开(公告)日：2021-03-11
申请号：US16592041
申请日：2019-10-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyung Hwan LEE , Yong Seok KIM , Tae Hun KIM , Seok Han PARK , Satoru YAMADA , Jae Ho HONG
Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including alternating gate electrodes and insulating layers stacked along a first direction, a vertical opening through the stack structure along the first direction, the vertical opening including a channel structure having a semiconductor layer on an inner sidewall of the vertical opening, and a variable resistive material on the semiconductor layer, a vacancy concentration in the variable resistive material varies along its width to have a higher concentration closer to a center of the channel structure than to the semiconductor layer, and an impurity region on the substrate, the semiconductor layer contacting the impurity region at a bottom of the channel structure.
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公开(公告)号：US20230019055A1
公开(公告)日：2023-01-19
申请号：US17954844
申请日：2022-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seok Han PARK , Yong Seok KIM , Hui-Jung KIM , Satoru YAMADA , Kyung Hwan LEE , Jae Ho HONG , Yoo Sang HWANG
IPC: H01L27/11597 , H01L27/1159 , H01L49/02 , H01L29/78 , H01L29/45 , H01L29/786 , H01L29/06
Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.
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公开(公告)号：US20210335798A1
公开(公告)日：2021-10-28
申请号：US17227793
申请日：2021-04-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung Hwan LEE , Yong Seok KIM , Hyun Cheol KIM , Satoru YAMADA , Sung Won YOO , Jae Ho HONG
IPC: H01L27/1156 , H01L27/11524 , H01L27/11529 , H01L27/11548 , H01L27/11551
Abstract: Provided is a semiconductor memory device. The semiconductor memory device comprises a first semiconductor pattern including a first impurity region, a second impurity region, and a channel region, the first impurity region spaced apart from a substrate in a first direction and having a first conductivity type, the second impurity region having a second conductivity type different from the first conductivity type, and the channel region between the first impurity region and the second impurity region, a first conductive connection line connected to the first impurity region and extending in a second direction different from the first direction and a first gate structure extending in the first direction and including a first gate electrode and a first gate insulating film, wherein the first gate electrode penetrates the channel region and the first gate insulating film is between the first gate electrode and the semiconductor pattern.
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