公开(公告)号：US20240357810A1

公开(公告)日：2024-10-24

申请号：US18757708

申请日：2024-06-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Hwan LEE ,  Yong Seok KIM ,  Il Gweon KIM ,  Hyun Cheol KIM ,  Hyeoung Won SEO ,  Sung Won YOO ,  Jae Ho HONG

IPC: H10B43/20 ,  H10B43/10

CPC classification number: H10B43/20 ,  H10B43/10

Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

公开(公告)号：US20220139948A1

公开(公告)日：2022-05-05

申请号：US17377848

申请日：2021-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Hwan LEE ,  Yong Seok KIM ,  Il Gweon KIM ,  Hyun Cheol KIM ,  Hyeoung Won SEO ,  Sung Won YOO ,  Jae Ho HONG

IPC: H01L27/11578 ,  H01L27/11565

Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.

公开(公告)号：US20220157887A1

公开(公告)日：2022-05-19

申请号：US17380331

申请日：2021-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Hwan LEE ,  Kwang Seok KIM ,  Yong Seok KIM ,  Il Gweon KIM ,  Kil Ho LEE

IPC: H01L27/22 ,  G11C11/16

Abstract: A three-dimensional semiconductor memory device is provided. The semiconductor memory device includes first horizontal conductive lines on a substrate in a first direction, each of the first horizontal conductive lines extending in a second direction different from the first direction, second horizontal conductive lines stacked on the substrate in the first direction, each of the second horizontal conductive lines extending in the second direction, a vertical conductive line between the first horizontal conductive line and the second horizontal conductive line and extending in the first direction, a plurality of first magnetic tunnel junction patterns between the vertical conductive line and each of the first horizontal conductive lines, and a plurality of second magnetic tunnel junction patterns between the vertical conductive lines and each of the second horizontal conductive lines. The first horizontal conductive lines and the second horizontal conductive lines are spaced apart from each other in a third direction.