公开(公告)号：US20170351625A1

公开(公告)日：2017-12-07

申请号：US15368445

申请日：2016-12-02

Applicant: QUALCOMM Incorporated

Inventor： Tin Tin Wee ,  Thomas Bryan

IPC: G06F13/16 ,  G11C11/401 ,  G06F9/445

CPC classification number: G06F13/1694 ,  G06F9/44505 ,  G06F13/4086 ,  G06F13/4234 ,  G11C11/401

Abstract: A multi-rank memory bus architecture is provided in which an active DRAM is unterminated and an inactive DRAM terminates to increase the data eye width at the active DRAM.

公开(公告)号：US10044342B2

公开(公告)日：2018-08-07

申请号：US15178389

申请日：2016-06-09

Applicant: QUALCOMM Incorporated

Inventor： LuVerne Ray Peterson ,  Thomas Bryan ,  Tin Tin Wee

IPC: H03K3/012 ,  H03K5/134 ,  H03K3/356 ,  H03K19/00 ,  H04L25/03 ,  G06F1/32 ,  H03K17/16 ,  H03K19/003 ,  H03K5/00

Abstract: A die-to-die data transmitter is disclosed with a pull-up one-shot circuit and a pull-down one-shot circuit, each forming a delay circuit that determines a variable preemphasis period.

公开(公告)号：US20180233907A1

公开(公告)日：2018-08-16

申请号：US15434285

申请日：2017-02-16

Applicant: QUALCOMM INCORPORATED

Inventor： Kenneth Dubowski ,  Luverne Ray Peterson ,  Thomas Bryan ,  Stephen Knol ,  Sreeker Dundigal ,  Alvin Loke

IPC: H02H9/04 ,  H01L23/00 ,  H01L27/02 ,  H01L23/485 ,  H01L23/50 ,  H01L25/065

Abstract: A semiconductor die including: a die-to-die interface including an input/output (I/O) circuitry area and an electrical contact area; wherein the electrical contact area includes an array of electrical contacts disposed on a side of the semiconductor die; and wherein the I/O circuitry area includes a plurality of drivers, each of the drivers coupled to at least one electrical contact in the electrical contact area, and a plurality of electrostatic discharge (ESD) protection devices, each of the ESD protection devices coupled to a respective driver, further wherein the I/O circuitry area and the electrical contact area are separated in a top-down view of the semiconductor die.

公开(公告)号：US09859888B2

公开(公告)日：2018-01-02

申请号：US15174842

申请日：2016-06-06

Applicant: QUALCOMM Incorporated

Inventor： LuVerne Ray Peterson ,  Thomas Bryan ,  Stephen Thilenius

IPC: H03B1/00 ,  H03K3/00 ,  H03K19/00 ,  H04B1/04 ,  H03K17/687

CPC classification number: H03K19/0013 ,  H03K17/6871 ,  H03K19/017 ,  H03K19/01721 ,  H04B1/04

Abstract: A transmitter is disclosed with a pull-up feedback circuit and a feedback circuit. The transmitter includes an output driver for driving an output terminal.

公开(公告)号：US20170353185A1

公开(公告)日：2017-12-07

申请号：US15174842

申请日：2016-06-06

Applicant: QUALCOMM Incorporated

Inventor： LuVerne Ray Peterson ,  Thomas Bryan ,  Stephen Thilenius

IPC: H03K19/00 ,  H04B1/04 ,  H03K17/687

CPC classification number: H03K19/0013 ,  H03K17/6871 ,  H03K19/017 ,  H03K19/01721 ,  H04B1/04

Abstract: A transmitter is disclosed with a pull-up feedback circuit and a feedback circuit. The transmitter includes an output driver for driving an output terminal.

公开(公告)号：US10424921B2

公开(公告)日：2019-09-24

申请号：US15434285

申请日：2017-02-16

Applicant: QUALCOMM INCORPORATED

Inventor： Kenneth Dubowski ,  Luverne Ray Peterson ,  Thomas Bryan ,  Stephen Knol ,  Sreeker Dundigal ,  Alvin Loke

IPC: H02H9/04 ,  H01L23/00 ,  H01L27/02 ,  H01L23/485 ,  H01L23/50 ,  H01L25/065 ,  H03K19/0175

Abstract: A semiconductor die including: a die-to-die interface including an input/output (I/O) circuitry area and an electrical contact area; wherein the electrical contact area includes an array of electrical contacts disposed on a side of the semiconductor die; and wherein the I/O circuitry area includes a plurality of drivers, each of the drivers coupled to at least one electrical contact in the electrical contact area, and a plurality of electrostatic discharge (ESD) protection devices, each of the ESD protection devices coupled to a respective driver, further wherein the I/O circuitry area and the electrical contact area are separated in a top-down view of the semiconductor die.

公开(公告)号：US09984011B2

公开(公告)日：2018-05-29

申请号：US15368445

申请日：2016-12-02

Applicant: QUALCOMM Incorporated

Inventor： Tin Tin Wee ,  Thomas Bryan

IPC: G06F13/16 ,  G11C11/401 ,  G06F9/445 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/1694 ,  G06F9/44505 ,  G06F13/4086 ,  G06F13/4234 ,  G11C11/401

Abstract: A multi-rank memory bus architecture is provided in which an active DRAM is unterminated and an inactive DRAM terminates to increase the data eye width at the active DRAM.

公开(公告)号：US20170359053A1

公开(公告)日：2017-12-14

申请号：US15178389

申请日：2016-06-09

Applicant: QUALCOMM Incorporated

Inventor： LuVerne Ray Peterson ,  Thomas Bryan ,  Tin Tin Wee

IPC: H03K3/012 ,  H03K5/134 ,  H04L25/03 ,  H03K3/356 ,  H03K19/00 ,  H03K5/00

CPC classification number: H03K3/012 ,  G06F1/32 ,  H03K3/356113 ,  H03K5/134 ,  H03K17/161 ,  H03K19/0005 ,  H03K19/0008 ,  H03K19/0013 ,  H03K19/00361 ,  H03K2005/00195 ,  H04L25/03019

Abstract: A die-to-die data transmitter is disclosed with a pull-up one-shot circuit and a pull-down one-shot circuit, each forming a delay circuit that determines a variable preemphasis period.

公开(公告)号：US09767889B1

公开(公告)日：2017-09-19

申请号：US15433814

申请日：2017-02-15

Applicant: QUALCOMM Incorporated

Inventor： Scott Powers ,  Thomas Bryan ,  Andrew Tohmc ,  Subrahmanya Pradeep Morusupalli ,  Tin Tin Wee ,  Kenneth Dubowski

IPC: G11C11/40 ,  G11C11/4096 ,  G11C11/408 ,  G11C11/4094 ,  H01L25/18 ,  H01L25/065 ,  H01L23/66 ,  H03H7/38

CPC classification number: G11C11/4096 ,  G11C7/1084 ,  G11C11/4093 ,  H01L23/66 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06586 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H03K19/00346 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A die is provided having an unterminated endpoint that capacitively loads its input impedance with a capacitance from capacitor while acting as a receiving endpoint and that isolates its output impedance from the capacitance while acting as a transmitting endpoint.

公开(公告)号：US09698782B1

公开(公告)日：2017-07-04

申请号：US15098129

申请日：2016-04-13

Applicant: QUALCOMM Incorporated

Inventor： Luverne Ray Peterson ,  Thomas Bryan ,  Stephen Thilenius

IPC: H03K3/00 ,  H03K19/003 ,  H03K17/16 ,  H03K19/00

CPC classification number: H03K19/00361 ,  H03K17/162 ,  H03K19/0013 ,  H03K19/018507

Abstract: A circuit includes a data input in communication with a first transistor stack; a first capacitor having a first capacitance and in communication with a power supply via a first transistor of the first transistor stack, wherein the first transistor is configured to charge the first capacitor in response to the data input receiving a signal corresponding to a first binary value; a data output node coupled between the first transistor stack and a transmission line having a second capacitance; and wherein the first capacitor is coupled between the data output node and a second transistor of the first transistor stack, further wherein the second transistor is configured to discharge the first capacitor to the data output node in response to the data input receiving a signal corresponding to a second binary value.