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公开(公告)号：US20150380482A1
公开(公告)日：2015-12-31
申请号：US14658121
申请日：2015-03-13
Inventor： Ho Kyun AHN , Hae Cheon KIM , Jong Won LIM , Dong Min KANG , Yong Hwan KWON , SEONG IL KIM , Zin Sig KIM , Eun Soo NAM , Byoung Gue MIN , Hyung Sup YOON , Kyung Ho LEE , Jong Min LEE , Kyu Jun CHO
IPC: H01L29/06 , H01L29/66 , H01L29/205 , H01L29/20 , H01L21/28 , H01L29/49 , H01L29/423 , H01L21/02 , H01L21/311 , H01L21/31 , H01L29/778 , H01L29/45
CPC classification number: H01L21/28264 , H01L29/2003 , H01L29/407 , H01L29/42316 , H01L29/4236 , H01L29/452 , H01L29/51 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66462 , H01L29/7786
Abstract: Provided herein is a semiconductor device including a substrate; an active layer formed on top of the substrate; a protective layer formed on top of the active layer and having a first aperture; a source electrode, driving gate electrode and drain electrode formed on top of the protective layer; and a first additional gate electrode formed on top of the first aperture, wherein an electric field is applied to the active layer, protective layer and driving gate electrode due to a voltage applied to each of the source electrode, drain electrode and driving gate electrode, and the first additional gate electrode is configured to attenuate a size of the electric field applied to at least a portion of the active layer, protective layer and driving gate electrode.
Abstract translation: 本文提供了包括基板的半导体器件; 形成在所述基板的顶部上的有源层; 形成在所述有源层的顶部上并具有第一孔的保护层; 源电极，形成在保护层顶部的驱动栅电极和漏电极; 以及形成在所述第一孔的顶部上的第一附加栅电极，其中由于施加到所述源电极，漏电极和驱动栅电极中的每一个的电压，向所述有源层，保护层和驱动栅电极施加电场， 并且第一附加栅电极被配置为衰减施加到有源层，保护层和驱动栅电极的至少一部分的电场的尺寸。
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2.发明申请FIELD-EFFECT TRANSISTOR FOR HIGH VOLTAGE DRIVING AND MANUFACTURING METHOD THEREOF 审中-公开用于高压驱动的场效应晶体管及其制造方法公开(公告)号：US20150194494A1
公开(公告)日：2015-07-09
申请号：US14243322
申请日：2014-04-02
Inventor： Ho Kyun AHN , Hae Cheon KIM , Zin Sig KIM , Sang Heung LEE , Byoung Gue MIN , Hyung Sup YOON , Dong Min KANG , Seong Il KIM , Jong Min LEE , Jong Won LIM , Yong Hwan KWON , Eun Soo NAM
IPC: H01L29/40 , H01L29/66 , H01L21/28 , H01L21/283 , H01L29/78 , H01L29/423
CPC classification number: H01L29/402 , H01L21/283 , H01L21/28593 , H01L29/2003 , H01L29/42312 , H01L29/42356 , H01L29/66462 , H01L29/66477 , H01L29/7787
Abstract: Disclosed are a field effect transistor for high voltage driving including a gate electrode structure in which a gate head extended in a direction of a drain is supported by a field plate embedded under a region of the gate head so as to achieve high voltage driving, and a manufacturing method thereof. Accordingly, the gate head extended in the direction of the drain is supported by the field plate electrically spaced by using an insulating layer, so that it is possible to stably manufacture a gate electrode including the extended gate head, and gate resistance is decreased by the gate head extended in the direction of the drain and an electric field peak value between the gate and the drain is decreased by the gate electrode including the gate head extended in the direction of the drain and the field plate proximate to the gate, thereby achieving an effect in that a breakdown voltage of a device is increased.
Abstract translation: 公开了一种用于高电压驱动的场效应晶体管，其包括栅极电极结构，其中在漏极方向上延伸的栅极头由嵌入在栅极头的区域内的场板支撑以实现高电压驱动，以及 其制造方法。 因此，在漏极方向上延伸的栅极头通过使用绝缘层而被电隔离的场板支撑，使得可以稳定地制造包括延伸栅极头的栅电极，并且栅极电阻通过 栅极头在漏极的方向上延伸，栅极和漏极之间的电场峰值由包括在漏极方向上延伸的栅极和靠近栅极的场板的栅电极减小，由此实现 效果是器件的击穿电压增加。
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公开(公告)号：US20150144961A1
公开(公告)日：2015-05-28
申请号：US14175452
申请日：2014-02-07
Inventor： Hyung Sup YOON , Byoung Gue MIN , Ho Kyun AHN , Jong Won LIM , Dong Min KANG , Jong Min LEE
IPC: H01L29/778 , H01L29/45 , H01L29/66
CPC classification number: H01L29/42316 , H01L29/2003 , H01L29/452 , H01L29/66462 , H01L29/7786
Abstract: A high frequency device includes: a capping layer formed on an epitaxial structure; source and drain electrodes formed on the capping layer; a multilayer insulating pattern formed on entire surfaces of the source and drain electrodes and the capping layer in a step shape; a T-shaped gate passing through the multilayer insulating pattern and the capping layer to be in contact with the epitaxial structure; and a passivation layer formed along entire surfaces of the T-shaped gate and the multilayer insulating pattern.
Abstract translation: 高频器件包括：形成在外延结构上的覆盖层; 源极和漏极形成在覆盖层上; 形成在所述源电极和漏电极以及所述覆盖层的整个表面上的阶梯形状的多层绝缘图案; 通过所述多层绝缘图案和所述覆盖层与所述外延结构接触的T形栅极; 以及在T形栅极和多层绝缘图案的整个表面上形成的钝化层。
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Patent Agency Ranking
公开(公告)号：US20170237171A1
公开(公告)日：2017-08-17
申请号：US15229891
申请日：2016-08-05
Inventor： Dong-Young KIM , Dong Min KANG , SEONG-IL KIM , Hae Cheon KIM , Jae Won DO , Byoung-Gue MIN , Ho Kyun AHN , Hyung Sup YOON , Sang-Heung LEE , Jong Min LEE , Jong-Won LIM , Yoo Jin JANG , Hyun Wook JUNG , Kyu Jun CHO , Chull Won JU
CPC classification number: H01Q9/0407 , H01Q1/50 , H01Q9/0442
Abstract: Provided herein is a patch antenna including a multilayered substrate on which a plurality of dielectric layers are laminated; at least one metal pattern layer disposed between the plurality of dielectric layers outside a central area of the multilayered substrate; an antenna patch disposed on an upper surface of the multilayered substrate and within the central area; a ground layer disposed on a lower surface of the multilayered substrate; a plurality of connection via patterns penetrating the plurality of dielectric layers to connect the metal pattern layer and the ground layer, and surrounding the central area; a transmission line comprising a first transmission line unit disposed on the upper surface of the multilayered substrate and located outside the central area, and a second transmission line unit disposed on the upper surface of the multilayered substrate and located within the central area; and an impedance transformer located below the second transmission line unit within the central area of the multilayered substrate.
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5.发明申请公开(公告)号：US20150177309A1
公开(公告)日：2015-06-25
申请号：US14302354
申请日：2014-06-11
Inventor： Jong Min LEE , Chull Won JU , Byoung Gue MIN
CPC classification number: G01R31/2621 , G01R31/2608
Abstract: A test device includes: a testing unit connected with a measurement line, and configured to apply bias to the measurement line and measure the measurement line; a plurality of switching units configured to electrically connect the measurement line and the plurality of samples; and a control unit configured to sequentially turn on the plurality of switching units to sequentially apply the bias to the plurality of samples. The control unit determines whether a corresponding device sample has a defect based on a first measurement value according to measurement by the testing unit when the bias is applied to each of the plurality of samples.
Abstract translation: 测试装置包括：测试单元，与测量线连接，并被配置为向测量线施加偏压并测量测量线; 多个开关单元，被配置为电连接所述测量线和所述多个样本; 以及控制单元，被配置为顺序地接通所述多个开关单元以将所述偏置顺序地施加到所述多个样本。 当偏置被应用于多个样本中的每一个时，控制单元根据测试单元的测量，基于第一测量值来确定对应的设备样本是否具有缺陷。
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公开(公告)号：US20140156822A1
公开(公告)日：2014-06-05
申请号：US14080874
申请日：2013-11-15
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , LG Uplus Corporation , SK TELECOM CO., LTD. , Solbox Inc.
Inventor： Taesang CHOI , John Dongho SHINN , Jong Min LEE , Ja-Ryeong KOO
IPC: H04L29/12
CPC classification number: H04L61/1511 , H04L61/303 , H04L67/2842 , H04L67/289
Abstract: A method of request routing redirection includes: receiving, by a first content delivery network (CDN) among a plurality of CDNs connected by CDN interconnection (CDNi), a domain name system (DNS) request including a list of CDN-provider-identifications (IDs) of higher CDNs, from a client; determining whether the client's request is processable; and when the client's request is not processable, redirecting the request, while preventing a loop of the request routing on the basis of the list of the CDN-provider-IDs.
Abstract translation: 一种请求路由重定向的方法包括：通过由CDN互连（CDNi）连接的多个CDN之中的第一内容传送网络（CDN）接收包括CDN提供商标识列表的域名系统（DNS）请求 ID）较高的CDN，来自客户端; 确定客户的请求是否可处理; 并且当客户端的请求不可处理时，重定向请求，同时根据CDN提供者ID的列表阻止请求路由的循环。
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公开(公告)号：US20170236909A1
公开(公告)日：2017-08-17
申请号：US15248676
申请日：2016-08-26
Inventor： Ho Kyun AHN , Dong Min KANG , Yong-Hwan KWON , Dong-Young KIM , SEONG IL KIM , Hae Cheon KIM , Eun Soo NAM , Jae Won DO , Byoung-Gue MIN , Hyung Sup YOON , Sang-Heung LEE , Jong Min LEE , Jong-Won LIM , Hyun Wook JUNG , Kyu Jun CHO
IPC: H01L29/40 , H01L29/66 , H01L29/778 , H01L29/20 , H01L29/205
CPC classification number: H01L29/404 , H01L21/6835 , H01L29/0619 , H01L29/0657 , H01L29/2003 , H01L29/205 , H01L29/401 , H01L29/4175 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L2221/68327 , H01L2221/6834
Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.
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公开(公告)号：US20170133471A1
公开(公告)日：2017-05-11
申请号：US15238492
申请日：2016-08-16
Inventor： Jong Min LEE , Byoung-Gue MIN , Hyung Sup YOON , Dong Min KANG , Dong-Young KIM , SEONG-IL KIM , Hae Cheon KIM , Jae Won DO , Ho Kyun AHN , Sang-Heung LEE , Jong-Won LIM , Hyun Wook JUNG , Kyu Jun CHO , Chull Won JU
IPC: H01L29/40 , H01L29/66 , H01L29/778 , H01L29/20 , H01L29/205
CPC classification number: H01L29/408 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7786 , H01L29/7787
Abstract: The present invention relates to a high reliability field effect power device and a manufacturing method thereof. A method of manufacturing a field effect power device includes sequentially forming a transfer layer, a buffer layer, a barrier layer and a passivation layer on a substrate, patterning the passivation layer by etching a first region of the passivation layer, and forming at least one electrode on the first region of the barrier layer exposed by patterning the passivation layer, wherein the first region is provided to form the at least one electrode, and the passivation layer may include a material having a wider bandgap than the barrier layer to prevent a trapping effect and a leakage current of the field effect power device.
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