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公开(公告)号:US20150349736A1
公开(公告)日:2015-12-03
申请号:US14666163
申请日:2015-03-23
Inventor: Sang Heung LEE , Dong Min KANG , SEONG IL KIM , Ho Kyun AHN , Hyung Sup YOON , Jong Won LIM , Chull Won JU
CPC classification number: H03G1/0088 , H03F1/083 , H03F3/08 , H03F2200/153 , H03G3/12
Abstract: Provided herein is a feedback amplifier including an amplifier circuit configured to amplify an input signal input from an input terminal and output the amplified input signal to an output terminal; a feedback circuit configured to apply a feedback resistance value to a signal output to the output terminal, and to control a gain of the amplifier circuit by adjusting the input signal by a bias voltage applied with a feedback resistance value determined; a packet signal sensor configured to generate a fixed resistance control signal for controlling a fixed resistance value included in the feedback resistance value through a comparison between the output from the output terminal with a minimum signal level; and a fixed resistance controller configured to control the fixed resistance value included in the feedback resistance value in response to the fixed resistance control signal.
Abstract translation: 本文提供了一种反馈放大器,包括:放大器电路,被配置为放大从输入端输入的输入信号,并将放大的输入信号输出到输出端; 反馈电路,被配置为向输出端子输出的信号施加反馈电阻值,并且通过利用所确定的反馈电阻值施加的偏置电压来调节所述输入信号来控制所述放大器电路的增益; 分组信号传感器,被配置为通过比较来自所述输出端子的输出与最小信号电平之间的比较,产生用于控制所述反馈电阻值中包括的固定电阻值的固定电阻控制信号; 以及固定电阻控制器,其被配置为响应于所述固定电阻控制信号来控制包括在所述反馈电阻值中的所述固定电阻值。
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公开(公告)号:US20150380482A1
公开(公告)日:2015-12-31
申请号:US14658121
申请日:2015-03-13
Inventor: Ho Kyun AHN , Hae Cheon KIM , Jong Won LIM , Dong Min KANG , Yong Hwan KWON , SEONG IL KIM , Zin Sig KIM , Eun Soo NAM , Byoung Gue MIN , Hyung Sup YOON , Kyung Ho LEE , Jong Min LEE , Kyu Jun CHO
IPC: H01L29/06 , H01L29/66 , H01L29/205 , H01L29/20 , H01L21/28 , H01L29/49 , H01L29/423 , H01L21/02 , H01L21/311 , H01L21/31 , H01L29/778 , H01L29/45
CPC classification number: H01L21/28264 , H01L29/2003 , H01L29/407 , H01L29/42316 , H01L29/4236 , H01L29/452 , H01L29/51 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66462 , H01L29/7786
Abstract: Provided herein is a semiconductor device including a substrate; an active layer formed on top of the substrate; a protective layer formed on top of the active layer and having a first aperture; a source electrode, driving gate electrode and drain electrode formed on top of the protective layer; and a first additional gate electrode formed on top of the first aperture, wherein an electric field is applied to the active layer, protective layer and driving gate electrode due to a voltage applied to each of the source electrode, drain electrode and driving gate electrode, and the first additional gate electrode is configured to attenuate a size of the electric field applied to at least a portion of the active layer, protective layer and driving gate electrode.
Abstract translation: 本文提供了包括基板的半导体器件; 形成在所述基板的顶部上的有源层; 形成在所述有源层的顶部上并具有第一孔的保护层; 源电极,形成在保护层顶部的驱动栅电极和漏电极; 以及形成在所述第一孔的顶部上的第一附加栅电极,其中由于施加到所述源电极,漏电极和驱动栅电极中的每一个的电压,向所述有源层,保护层和驱动栅电极施加电场, 并且第一附加栅电极被配置为衰减施加到有源层,保护层和驱动栅电极的至少一部分的电场的尺寸。
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公开(公告)号:US20170236909A1
公开(公告)日:2017-08-17
申请号:US15248676
申请日:2016-08-26
Inventor: Ho Kyun AHN , Dong Min KANG , Yong-Hwan KWON , Dong-Young KIM , SEONG IL KIM , Hae Cheon KIM , Eun Soo NAM , Jae Won DO , Byoung-Gue MIN , Hyung Sup YOON , Sang-Heung LEE , Jong Min LEE , Jong-Won LIM , Hyun Wook JUNG , Kyu Jun CHO
IPC: H01L29/40 , H01L29/66 , H01L29/778 , H01L29/20 , H01L29/205
CPC classification number: H01L29/404 , H01L21/6835 , H01L29/0619 , H01L29/0657 , H01L29/2003 , H01L29/205 , H01L29/401 , H01L29/4175 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L2221/68327 , H01L2221/6834
Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.
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