公开(公告)号：US20140166615A1

公开(公告)日：2014-06-19

申请号：US13939530

申请日：2013-07-11

Applicant: Electronics and Telecommunications Research Institute

Inventor： Zin Sig KIM ,  Hokyun Ahn

IPC: B29C59/02

CPC classification number: G03F7/0002

Abstract: Mold structures for imprint lithography are provided. Mold chip patterns including patterns for nano structures are disposed on a mold substrate. A trench region is provided between the mold chip patterns. Protrusion portions protrude from a bottom surface of the trench region. The protrusion portions extend along the trench region in a plan view.

Abstract translation: 提供压印光刻的模具结构。 包括纳米结构的图案的模具芯片图案设置在模具基板上。 沟槽区域设置在模具芯片图案之间。 突出部分从沟槽区域的底表面突出。 突出部分在平面图中沿沟槽区域延伸。

公开(公告)号：US20150380482A1

公开(公告)日：2015-12-31

申请号：US14658121

申请日：2015-03-13

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Ho Kyun AHN ,  Hae Cheon KIM ,  Jong Won LIM ,  Dong Min KANG ,  Yong Hwan KWON ,  SEONG IL KIM ,  Zin Sig KIM ,  Eun Soo NAM ,  Byoung Gue MIN ,  Hyung Sup YOON ,  Kyung Ho LEE ,  Jong Min LEE ,  Kyu Jun CHO

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/205 ,  H01L29/20 ,  H01L21/28 ,  H01L29/49 ,  H01L29/423 ,  H01L21/02 ,  H01L21/311 ,  H01L21/31 ,  H01L29/778 ,  H01L29/45

CPC classification number: H01L21/28264 ,  H01L29/2003 ,  H01L29/407 ,  H01L29/42316 ,  H01L29/4236 ,  H01L29/452 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66462 ,  H01L29/7786

Abstract: Provided herein is a semiconductor device including a substrate; an active layer formed on top of the substrate; a protective layer formed on top of the active layer and having a first aperture; a source electrode, driving gate electrode and drain electrode formed on top of the protective layer; and a first additional gate electrode formed on top of the first aperture, wherein an electric field is applied to the active layer, protective layer and driving gate electrode due to a voltage applied to each of the source electrode, drain electrode and driving gate electrode, and the first additional gate electrode is configured to attenuate a size of the electric field applied to at least a portion of the active layer, protective layer and driving gate electrode.

Abstract translation: 本文提供了包括基板的半导体器件; 形成在所述基板的顶部上的有源层; 形成在所述有源层的顶部上并具有第一孔的保护层; 源电极，形成在保护层顶部的驱动栅电极和漏电极; 以及形成在所述第一孔的顶部上的第一附加栅电极，其中由于施加到所述源电极，漏电极和驱动栅电极中的每一个的电压，向所述有源层，保护层和驱动栅电极施加电场， 并且第一附加栅电极被配置为衰减施加到有源层，保护层和驱动栅电极的至少一部分的电场的尺寸。

公开(公告)号：US20150194494A1

公开(公告)日：2015-07-09

申请号：US14243322

申请日：2014-04-02

Applicant: Electronics and Telecommunications Research Institute

Inventor： Ho Kyun AHN ,  Hae Cheon KIM ,  Zin Sig KIM ,  Sang Heung LEE ,  Byoung Gue MIN ,  Hyung Sup YOON ,  Dong Min KANG ,  Seong Il KIM ,  Jong Min LEE ,  Jong Won LIM ,  Yong Hwan KWON ,  Eun Soo NAM

IPC: H01L29/40 ,  H01L29/66 ,  H01L21/28 ,  H01L21/283 ,  H01L29/78 ,  H01L29/423

CPC classification number: H01L29/402 ,  H01L21/283 ,  H01L21/28593 ,  H01L29/2003 ,  H01L29/42312 ,  H01L29/42356 ,  H01L29/66462 ,  H01L29/66477 ,  H01L29/7787

Abstract: Disclosed are a field effect transistor for high voltage driving including a gate electrode structure in which a gate head extended in a direction of a drain is supported by a field plate embedded under a region of the gate head so as to achieve high voltage driving, and a manufacturing method thereof. Accordingly, the gate head extended in the direction of the drain is supported by the field plate electrically spaced by using an insulating layer, so that it is possible to stably manufacture a gate electrode including the extended gate head, and gate resistance is decreased by the gate head extended in the direction of the drain and an electric field peak value between the gate and the drain is decreased by the gate electrode including the gate head extended in the direction of the drain and the field plate proximate to the gate, thereby achieving an effect in that a breakdown voltage of a device is increased.

Abstract translation: 公开了一种用于高电压驱动的场效应晶体管，其包括栅极电极结构，其中在漏极方向上延伸的栅极头由嵌入在栅极头的区域内的场板支撑以实现高电压驱动，以及 其制造方法。 因此，在漏极方向上延伸的栅极头通过使用绝缘层而被电隔离的场板支撑，使得可以稳定地制造包括延伸栅极头的栅电极，并且栅极电阻通过 栅极头在漏极的方向上延伸，栅极和漏极之间的电场峰值由包括在漏极方向上延伸的栅极和靠近栅极的场板的栅电极减小，由此实现 效果是器件的击穿电压增加。