Method of manufacturing display device including thin film transistor
    1.
    发明授权
    Method of manufacturing display device including thin film transistor 失效
    制造包括薄膜晶体管的显示装置的方法

    公开(公告)号:US08546164B2

    公开(公告)日:2013-10-01

    申请号:US13293158

    申请日:2011-11-10

    IPC分类号: H01L21/36

    CPC分类号: H01L29/7869 H01L27/1225

    摘要: A thin film transistor (TFT), including a substrate, a gate electrode on the substrate, an oxide semiconductor layer including a channel region, a source region, and a drain region, a gate insulating layer between the gate electrode and the oxide semiconductor layer, and source and drain electrodes in contact with the source and drain regions of the oxide semiconductor layer, respectively, wherein the oxide semiconductor layer has a GaInZnO (GIZO) bilayer structure including a lower layer and an upper layer, and the upper layer has a different indium (In) concentration than the lower layer.

    摘要翻译: 一种薄膜晶体管(TFT),包括基板,基板上的栅电极,包括沟道区,源极区和漏极区的氧化物半导体层,栅电极和氧化物半导体层之间的栅极绝缘层 以及与氧化物半导体层的源极和漏极区域接触的源极和漏极,其中氧化物半导体层具有包括下层和上层的GaInZnO(GIZO)双层结构,并且上层具有 不同的铟(In)浓度比下层。

    THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND FLAT PANEL DISPLAY DEVICE HAVING THE SAME
    3.
    发明申请
    THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND FLAT PANEL DISPLAY DEVICE HAVING THE SAME 有权
    薄膜晶体管,其制造方法和具有该薄膜晶体管的平板显示器件

    公开(公告)号:US20120153278A1

    公开(公告)日:2012-06-21

    申请号:US13408825

    申请日:2012-02-29

    IPC分类号: H01L33/08 H01L21/34

    摘要: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include a gate electrode formed on a substrate; an active layer made of an oxide semiconductor and insulated from the gate electrode by a gate insulating layer; source and drain electrodes coupled to the active layer; and an interfacial stability layer formed on one or both surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristic as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.

    摘要翻译: 使用氧化物半导体作为有源层的薄膜晶体管(TFT),制造TFT的方法以及具有该TFT的平板显示装置包括形成在基板上的栅电极; 由氧化物半导体制成的有源层,并通过栅极绝缘层与栅电极绝缘; 源极和漏极耦合到有源层; 以及形成在活性层的一个或两个表面上的界面稳定层。 在TFT中,界面稳定层由带隙为3.0〜8.0eV的氧化物形成。 由于界面稳定层具有与栅极绝缘层和钝化层相同的特性,因此保持化学上高的界面稳定性。 由于界面稳定层具有等于或大于有源层的带隙,所以物理地防止了电荷俘获。

    Static electricity preventing assembly for display device and method of manufacturing the same
    9.
    发明授权
    Static electricity preventing assembly for display device and method of manufacturing the same 有权
    用于显示装置的静电防止组件及其制造方法

    公开(公告)号:US07903187B2

    公开(公告)日:2011-03-08

    申请号:US11635501

    申请日:2006-12-08

    IPC分类号: G02F1/1333 H01L27/13

    摘要: A static electricity preventing assembly for an electronic device, may include a substrate, a buffer layer on the substrate, the buffer layer including a plurality of contact holes exposing respective regions of the substrate, a shorting bar on the buffer layer, pad electrodes on the buffer layer, metal wiring lines on the buffer layer, wherein a first portion of each of the metal wiring lines may be electrically connected to the substrate through the contact holes, a second portion of each of the metal wiring lines may be connected to a respective one of the pad electrodes, and a third portion of each of the metal wiring lines may be connected to the shorting bar, wherein the first portion may be between the second portion and the third portion.

    摘要翻译: 一种用于电子设备的静电防止组件可以包括衬底,衬底上的缓冲层,缓冲层包括暴露衬底各自区域的多个接触孔,缓冲层上的短路棒, 缓冲层,缓冲层上的金属布线,其中每个金属布线的第一部分可以通过接触孔电连接到基板,每个金属布线的第二部分可以连接到相应的 焊盘电极中的一个,并且每个金属布线的第三部分可以连接到短路棒,其中第一部分可以在第二部分和第三部分之间。

    Polysilicon thin film transistor and method of fabricating the same
    10.
    发明授权
    Polysilicon thin film transistor and method of fabricating the same 有权
    多晶硅薄膜晶体管及其制造方法

    公开(公告)号:US07803699B2

    公开(公告)日:2010-09-28

    申请号:US11507606

    申请日:2006-08-22

    IPC分类号: H01L21/20

    摘要: A polysilicon thin film transistor (TFT) may include a substrate, at least one insulating layer, a semiconductor layer, a gate electrode, a source electrode, a drain electrode, and a heat retaining layer formed to contact the semiconductor layer. The heat retaining layer may reduce and/or prevent a reduction in a melt duration time of amorphous silicon during a crystallization process for forming a polysilicon layer of the TFT.

    摘要翻译: 多晶硅薄膜晶体管(TFT)可以包括基板,至少一个绝缘层,半导体层,栅电极,源电极,漏电极和形成为接触半导体层的保温层。 在用于形成TFT的多晶硅层的结晶工艺期间,保温层可以减少和/或防止非晶硅的熔融持续时间的减少。