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    Reducing spurs in analog to digital and digital to analog conversions
    1.
    发明授权
    Reducing spurs in analog to digital and digital to analog conversions 有权

    公开(公告)号：US11909411B2

    公开(公告)日：2024-02-20

    申请号：US17482791

    申请日：2021-09-23

    Applicant: Viavi Solutions Inc.

    Inventor： Michel Lecompte

    IPC: H03M1/08 ,  H03M1/06 ,  H03M1/12 ,  H03M1/66

    CPC classification number: H03M1/0836 ,  H03M1/0675 ,  H03M1/0863 ,  H03M1/12 ,  H03M1/66

    Abstract: Embodiments disclosed herein may reduce or even eliminate spurs introduced into the signals during analog to digital or digital to analog conversions. The spurs may be introduced by components such as clocks of the converter circuits. In an analog to digital conversion, the input signal may be split into two parts: the first portion passing through a first analog to digital converter (ADC) and an inverted second portion passing through a second ADC. A digital subtractor may subtract the output of the second ADC from the output of the first ADC converter thereby reducing the spurs. In digital to analog conversion, a digital input is passed through a first digital to analog converter (DAC) and an inverted digital input is passed through a second DAC. The output of the second DAC is inverted and combined with the output of the first DAC to reduce the spurs.

    Temperature feedback control apparatus, method, and system
    2.
    发明授权
    Temperature feedback control apparatus, method, and system 有权

    公开(公告)号：US11843391B2

    公开(公告)日：2023-12-12

    申请号：US17448113

    申请日：2021-09-20

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Xu Sun ,  Jiao Wang ,  Yuchen Liu ,  Rui Li ,  Nguyen Binh Le

    IPC: H03M1/06 ,  H03M1/08 ,  G02F7/00

    CPC classification number: H03M1/089 ,  G02F7/00 ,  H03M1/0818 ,  H03M1/0863

    Abstract: This application discloses a temperature feedback control apparatus, method. The method includes two electric switches, a feedback control unit and an optical component. A first electric switch is configured to control that only a first channel of at least two channels that correspond to the first electric switch is conducted at a moment, to feed back an optical signal of a target optical component connected to the first channel to the feedback control unit. The feedback control unit is configured to calculate temperature of the corresponding optical component based on an electrical signal converted from the optical signal, to obtain a control signal. The second electric switch is configured to control, when the first channel is conducted, that only the second channel is conducted, to transmit the control signal to the target optical component to adjust its temperature. The optical component connects to both the first and second channels.

    DYNAMIC POWER SWITCHING IN CURRENT-STEERING DACS
    3.
    发明申请
    DYNAMIC POWER SWITCHING IN CURRENT-STEERING DACS 审中-公开

    公开(公告)号：US20180248558A1

    公开(公告)日：2018-08-30

    申请号：US15966066

    申请日：2018-04-30

    Applicant: Maxlinear, Inc.

    Inventor： Jianyu Zhu

    IPC: H03M1/08 ,  H04B15/02 ,  H03M1/66 ,  H03M1/00 ,  H03M1/74

    CPC classification number: H03M1/0863 ,  H03M1/002 ,  H03M1/66 ,  H03M1/664 ,  H03M1/742 ,  H04B15/02

    Abstract: Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.

    Dummy signal generation for reducing data dependent noise in digital-to-analog converters
    6.
    发明授权
    Dummy signal generation for reducing data dependent noise in digital-to-analog converters 有权

    公开(公告)号：US09716508B1

    公开(公告)日：2017-07-25

    申请号：US15150833

    申请日：2016-05-10

    Applicant: ANALOG DEVICES GLOBAL

    Inventor： Lin Zhang

    IPC: H03M1/06 ,  H03M1/08 ,  H03M1/66

    CPC classification number: H03M1/0863 ,  H03M1/0678 ,  H03M1/687

    Abstract: Mechanisms for generating dummy signals for use in reducing data dependent noise in DACs are disclosed. Disclosed mechanisms differentiate between odd and even bits of a digital data signal to be converted and generate dummy signals by inverting some of these bits and leaving other bits as they are (i.e. including them in their non-inverted form). One dummy signal is generated as a sequence of bits that is the same as a sequence of bits of a data signal except that every odd bit of the data signal is inverted. An alternative dummy signal is generated as a sequence of bits that is the same as a sequence of bits of a data signal except that every even bit is inverted. Generating dummy signals in this manner eliminates the need to use calibration, feedback, or transition detectors, advantageously resulting in increased timing margins and substantial power savings over existing implementations.

    Threshold detection with digital correction in analog to digital converters
    8.
    发明授权
    Threshold detection with digital correction in analog to digital converters 有权

    公开(公告)号：US09680492B1

    公开(公告)日：2017-06-13

    申请号：US15246369

    申请日：2016-08-24

    Applicant: Xilinx, Inc.

    Inventor： Brendan Farley ,  Christophe Erdmann

    IPC: H03M1/12 ,  H03M1/38

    CPC classification number: H03M1/0863 ,  H03M1/462 ,  H03M1/468

    Abstract: An analog to digital converter (ADC) includes a comparator and a plurality of capacitor pairs coupled between first and second inputs the comparator, where each one of the capacitor pairs corresponds to one of a plurality of cycles used by the ADC to generate a digital value representing a sampled analog voltage. The ADC also includes a voltage detection circuit and a state machine that is configured to, upon determining during a first cycle that the sampled voltage across the first and second inputs satisfies a threshold, maintaining a first pair of the plurality of capacitor pairs in a default state such that the sampled analog voltage is unchanged. Otherwise, the state machine is configured to switch the first pair of the plurality of capacitor pairs to change the sampled analog voltage.

    Analog-to-digital converter with redundancy for image sensor readout
    9.
    发明授权
    Analog-to-digital converter with redundancy for image sensor readout 有权
    具有图像传感器读数冗余的模数转换器

    公开(公告)号：US09548755B2

    公开(公告)日：2017-01-17

    申请号：US14323998

    申请日：2014-07-03

    Applicant: Forza Silicon Corporation

    Inventor： Steven Huang ,  Ali Mesgarani ,  Daniel Van Blerkom

    IPC: H03M1/14 ,  H03M1/08 ,  H03M1/12 ,  H03M1/46 ,  H03M1/56

    CPC classification number: H03M1/14 ,  H03M1/0863 ,  H03M1/123 ,  H03M1/145 ,  H03M1/466 ,  H03M1/56

    Abstract: Methods and systems for analog-to-digital conversion applicable to an image sensor, such as a CMOS image sensor, in which an ADC comprises built-in redundancy such that the ADC can start its conversion cycle before the ADC input settles to a desired resolution and the ADC can yet accurately convert the ADC input to a digital value with the desired resolution. In a CMOS image sensor, such an ADC configuration enables the pixel readout time to overlap with the ADC conversion time, reducing the total time needed to convert the pixel signal value to a digital value with the desired resolution.

    Abstract translation: 适用于图像传感器（例如CMOS图像传感器）的模数转换的方法和系统，其中ADC包括内置冗余，使得ADC可以在ADC输入稳定到期望分辨率之前开始其转换周期 并且ADC可以将ADC输入精确地转换为具有所需分辨率的数字值。 在CMOS图像传感器中，这种ADC配置使得像素读出时间与ADC转换时间重叠，从而减少将像素信号值转换为具有期望分辨率的数字值所需的总时间。

    SWITCHING CIRCUIT
    10.
    发明申请
    SWITCHING CIRCUIT 有权
    切换电路

    公开(公告)号：US20170005654A1

    公开(公告)日：2017-01-05

    申请号：US15195707

    申请日：2016-06-28

    Applicant: IMEC VZW

    Inventor： Xiaoqiang Zhang ,  Mark Ingels

    IPC: H03K17/687 ,  H04L27/20 ,  H03M1/66

    CPC classification number: H03K17/687 ,  H03F1/086 ,  H03F1/14 ,  H03F1/3205 ,  H03F3/193 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2178 ,  H03F3/245 ,  H03F2200/231 ,  H03F2200/324 ,  H03F2200/336 ,  H03F2200/451 ,  H03F2200/519 ,  H03F2200/525 ,  H03F2200/61 ,  H03F2200/75 ,  H03K17/161 ,  H03K17/164 ,  H03K17/6292 ,  H03M1/0863 ,  H03M1/66 ,  H03M1/742 ,  H04L27/20

    Abstract: A conversion circuit is disclosed. In one aspect, the conversion circuit includes a first input terminal for receiving a digital signal. The conversion circuit includes a second input terminal for receiving a bias voltage signal. The conversion circuit includes an output terminal for outputting a current. The conversion circuit includes a first and a second switch transistor connected to the first input terminal for receiving the digital signal. The conversion circuit includes a first and a second current source transistor connected to the second input terminal for receiving the bias voltage signal. The conversion circuit further includes a first branch, wherein the first switch transistor is connected to the output terminal via the first current source transistor. The conversion circuit further includes a second branch, wherein the second current source transistor is connected to the output terminal via the second switch transistor.

    Abstract translation: 公开了一种转换电路。 一方面，转换电路包括用于接收数字信号的第一输入端。 转换电路包括用于接收偏置电压信号的第二输入端。 转换电路包括用于输出电流的输出端子。 转换电路包括连接到第一输入端的第一和第二开关晶体管，用于接收数字信号。 转换电路包括连接到第二输入端的第一和第二电流源晶体管，用于接收偏置电压信号。 转换电路还包括第一分支，其中第一开关晶体管经由第一电流源晶体管连接到输出端子。 转换电路还包括第二分支，其中第二电流源晶体管经由第二开关晶体管连接到输出端子。

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