Amplifier circuit
    1.
    发明授权

    公开(公告)号:US12107548B2

    公开(公告)日:2024-10-01

    申请号:US17229809

    申请日:2021-04-13

    摘要: An amplifier circuit includes an input terminal used to receive an input signal, an output terminal used to output an output signal, an amplification unit, and a phase adjustment unit. The amplification unit includes an input terminal coupled to the input terminal of the amplifier circuit, an output terminal coupled to the output terminal of the amplifier circuit, a first terminal coupled to a first voltage terminal, and a second terminal coupled to a second voltage terminal. The phase adjustment unit is coupled to the amplification unit. When the amplifier circuit is operated in a first mode, the output signal has a first phase, and when the amplifier circuit is operated in a second mode, the output signal has a second phase. A difference between the first phase and the second phase is within a predetermined range.

    VOLTAGE BUFFER
    2.
    发明公开
    VOLTAGE BUFFER 审中-公开

    公开(公告)号:US20240223130A1

    公开(公告)日:2024-07-04

    申请号:US18090756

    申请日:2022-12-29

    IPC分类号: H03F1/08 H03F3/50

    CPC分类号: H03F1/086 H03F3/505

    摘要: In an example, a circuit includes a first field-effect transistor (FET) having a gate and first and second terminals. The circuit includes a second FET having a gate and first and second terminals, the second terminals of the first and second FETs coupled together. The circuit includes a first boosted follower coupled to the gate of the first FET and includes a second boosted follower coupled to the gate of the second FET. A third FET is coupled to the first boosted follower and the second voltage terminal and configured to turn off the first boosted follower responsive to a first level of an output voltage. A fourth FET is coupled to the second boosted follower and the first voltage terminal and configured to turn off the second boosted follower responsive to a second level of the output voltage.

    AMPLIFIER WITH OUTPUT HARMONIC TERMINATION AND OUTPUT IMPEDANCE NETWORK

    公开(公告)号:US20240178803A1

    公开(公告)日:2024-05-30

    申请号:US18170390

    申请日:2023-02-16

    申请人: NXP USA, Inc.

    IPC分类号: H03F3/193 H03F1/08 H03F1/56

    摘要: An amplifier device may include an amplifier transistor and having harmonic termination circuitry and an output impedance network, such as an output T network, coupled to the output of the amplifier transistor. The amplifier device may be configured as an inverted F class amplifier having an operational frequency range with a center frequency of less than or equal to around 2.6 GHz. The harmonic termination circuitry and output impedance network may be configured to create a short circuit or near short circuit at the amplifier transistor output for third harmonic frequencies of the center frequency of the amplifier transistor and to create an open circuit or near open circuit at the amplifier transistor output for second harmonic frequencies of the center frequency. The output impedance network may be configured to increase the output impedance at the center frequency and reduce signal loss for the amplifier device.

    Modulator circuit, corresponding device and method

    公开(公告)号:US11463078B2

    公开(公告)日:2022-10-04

    申请号:US17322100

    申请日:2021-05-17

    摘要: An embodiment pulse-width modulation (PWM) modulator circuit comprises a first half-bridge stage having a first output node and a second half-bridge stage having a second output node. The first output node and the second output node are configured to have an electrical load coupled therebetween to apply thereto a PWM-modulated output signal. The circuit comprises a differential stage having input nodes configured to receive an input signal applied between the input nodes and produce a differential control signal for the first half-bridge stage and the second half-bridge stage. A current comparator is arranged intermediate the differential stage and the first and second half-bridge stages. The current comparator is configured to produce a PWM-modulated drive signal to drive the half-bridge stages as a function of the input signal applied between the input nodes in the differential stage.

    Transceiver front-end with receiver branch matching network including integrated electrostatic discharge protection

    公开(公告)号:US11380993B2

    公开(公告)日:2022-07-05

    申请号:US16720279

    申请日:2019-12-19

    IPC分类号: H01Q5/335 H03F1/08 H04B1/44

    摘要: Disclosed are embodiments of a transceiver front-end configured for a reduced noise figure (NF). Each of the embodiments includes an antenna, a transmitter branch and a receiver branch all connected to an input/output pad. The transmitter branch is coupled to the input/output pad (and thereby the antenna) by an impedance transformer. Only the receiver branch is selectively electrically connected to the input/output pad (and thereby the antenna) by a switch. A common matching network between the input/output pad and the switch provides both impedance matching and electrostatic discharge protection for the switch and the low noise amplifier, thereby reducing NF. Specific embodiments are disclosed for integration into specific technologies (e.g., fully depleted silicon-on-insulator (FDSOI) technology and fin-type field effect transistor (finFET) technology).

    Differential transimpedance amplifier

    公开(公告)号:US11336236B2

    公开(公告)日:2022-05-17

    申请号:US16981864

    申请日:2019-03-20

    摘要: A transimpedance amplifier is provided for converting a current between its two input terminals to a voltage over its two output terminals comprising a high-speed level shifter configured for creating a difference in input DC voltage and for being transparent for alternating voltages, an input biasing network configured for reverse biasing a photodiode connected to at least one of the input terminals and transparent for a feedback signal from the feedback network which is differentially and DC-coupled with the output terminals of the voltage amplifier and outputs of the feedback network are differentially and DC-coupled with the input biasing network of which outputs are coupled with inputs of the level shifter which is differentially and DC-coupled with input terminals of the voltage amplifier.

    Dynamic stability control in amplifier driving high Q load

    公开(公告)号:US11277104B2

    公开(公告)日:2022-03-15

    申请号:US16786956

    申请日:2020-02-10

    IPC分类号: H03F1/34 H03F3/181 H03F1/08

    摘要: A dynamically stabilizable amplifier drives an output current into an RLC load. A driver stage generates the output current, and a control circuit compares a current level of the amplifier output with a threshold and selectively enables a stabilizing resistor (to selectively shunt the load or dampen in series with the load, depending on RLC load type) at the driver stage output based on the comparison so that the amplifier is stable across a range of the output current level. The control circuit disables the resistor when the output current is above the highest threshold and enables it when below. The control circuit may control the resistor to have one of multiple resistance values based on a comparison with multiple thresholds. The output current level may be determined by replicating the output current level or by an input current level that sets the output current level independent of the load.

    BROADBAND, HIGH-EFFICIENCY, NON-MODULATING POWER AMPLIFIER ARCHITECTURE

    公开(公告)号:US20220060151A1

    公开(公告)日:2022-02-24

    申请号:US17517170

    申请日:2021-11-02

    摘要: Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.

    Trans-Impedance Amplifier, Chip, and Communications Device

    公开(公告)号:US20220021360A1

    公开(公告)日:2022-01-20

    申请号:US17443717

    申请日:2021-07-27

    发明人: Baoyue Wei Yuemiao Di

    摘要: A trans-impedance amplifier (TIA) includes a first circuit, a second circuit, and a third circuit. Both the first circuit and the second circuit are coupled to a current source, an operational amplifier, and the third circuit. The first circuit is configured to receive a first current, provide a third voltage to the third circuit, perform shape filtering on the first current, and convert the shape filtered first current to a first voltage for output. The second circuit is configured to receive a second current, provide a fourth voltage to the third circuit, perform shape filtering on the second current, and convert the shape filtered second current to a second voltage for output. The third circuit is configured to cooperate with the first circuit and the second circuit in performing shape filtering. The operational amplifier is configured to provide a small-signal virtual ground point to the first circuit.