Transceiver front-end with receiver branch matching network including integrated electrostatic discharge protection

    公开(公告)号:US11380993B2

    公开(公告)日:2022-07-05

    申请号:US16720279

    申请日:2019-12-19

    IPC分类号: H01Q5/335 H03F1/08 H04B1/44

    摘要: Disclosed are embodiments of a transceiver front-end configured for a reduced noise figure (NF). Each of the embodiments includes an antenna, a transmitter branch and a receiver branch all connected to an input/output pad. The transmitter branch is coupled to the input/output pad (and thereby the antenna) by an impedance transformer. Only the receiver branch is selectively electrically connected to the input/output pad (and thereby the antenna) by a switch. A common matching network between the input/output pad and the switch provides both impedance matching and electrostatic discharge protection for the switch and the low noise amplifier, thereby reducing NF. Specific embodiments are disclosed for integration into specific technologies (e.g., fully depleted silicon-on-insulator (FDSOI) technology and fin-type field effect transistor (finFET) technology).

    Apparatus and method for integrating self-test oscillator with injection locked buffer

    公开(公告)号:US10942255B2

    公开(公告)日:2021-03-09

    申请号:US16157230

    申请日:2018-10-11

    摘要: The disclosure provides an apparatus including: a pair of signal injection transistors each having a gate terminal coupled to a differential reference signal, and a pair of cross-coupled amplifier transistors configured to amplify a voltage of the differential reference signal to yield a voltage-amplified reference signal at a local oscillator (LO) port of a mixer; an electronic oscillator having an oscillation output node coupled to the LO port of the mixer in parallel with the injection-locked buffer, and configured to generate an oscillator output for transmission to the output node based on a back gate bias voltage applied to the electronic oscillator; and an access transistor having a gate coupled to a switching node, and a back gate terminal coupled to the back gate bias voltage, wherein the access transistor is configured to enable or disable current flow through the electronic oscillator in parallel with the injection-locked buffer.

    TRANSCEIVER FRONT-END WITH RECEIVER BRANCH MATCHING NETWORK INCLUDING INTEGRATED ELECTROSTATIC DISCHARGE PROTECTION

    公开(公告)号:US20210194125A1

    公开(公告)日:2021-06-24

    申请号:US16720279

    申请日:2019-12-19

    IPC分类号: H01Q5/335 H04B1/44 H03F1/08

    摘要: Disclosed are embodiments of a transceiver front-end configured for a reduced noise figure (NF). Each of the embodiments includes an antenna, a transmitter branch and a receiver branch all connected to an input/output pad. The transmitter branch is coupled to the input/output pad (and thereby the antenna) by an impedance transformer. Only the receiver branch is selectively electrically connected to the input/output pad (and thereby the antenna) by a switch. A common matching network between the input/output pad and the switch provides both impedance matching and electrostatic discharge protection for the switch and the low noise amplifier, thereby reducing NF. Specific embodiments are disclosed for integration into specific technologies (e.g., fully depleted silicon-on-insulator (FDSOI) technology and fin-type field effect transistor (finFET) technology).