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公开(公告)号：US20240356492A1
公开(公告)日：2024-10-24
申请号：US18240564
申请日：2023-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rajavelu Thinakaran , Gautam Nandi
IPC: H03F1/02
CPC classification number: H03F1/0211 , H03F2200/144 , H03F2200/462 , H03F2200/471
Abstract: The techniques and circuits, described herein, include solutions for reducing measure current settling time in source measurement units (SMUs) during a force voltage mode of operation. An SMU includes a force amplifier having a first voltage input, a second voltage input, a feedback voltage input, and a output. A resistor has a first terminal coupled to the output of the force amplifier, and a second terminal. A switch is coupled between the second terminal of the resistor and the feedback voltage input of the force amplifier. The switch is closed in the force voltage mode, creating a feedback path which the resistor is contained within. A series combination of a capacitor and a resistor is coupled to a gate of a transistor within the force amplifier, which results in improved measure current settling time compared to alternative techniques.
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公开(公告)号：US20240146256A1
公开(公告)日：2024-05-02
申请号：US18406864
申请日：2024-01-08
Applicant: Huawei Technologies Co., Ltd.
CPC classification number: H03F3/082 , H03F1/342 , H03F2200/144 , H03F2200/441
Abstract: Embodiments of this application disclose a trans-impedance amplifier and a trans-impedance amplifier control method that are used in the field of circuit technologies. A trans-impedance amplifier TIA includes an inverting amplification circuit and a voltage clamping circuit. The inverting amplification circuit is connected in parallel to the voltage clamping circuit. The inverting amplification circuit includes a first PMOS transistor and a first NMOS transistor that have a common gate. A source of the first PMOS transistor is connected to a drain of the first NMOS transistor. The voltage clamping circuit includes a second PMOS transistor and a second NMOS transistor that have a common gate. Gates of the two transistors are connected to an input end of the TIA. A source of the second NMOS transistor and a drain of the second PMOS transistor are connected to an output end of the TIA.
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3.发明申请公开(公告)号：US20190089316A1
公开(公告)日：2019-03-21
申请号：US16128797
申请日：2018-09-12
Applicant: Integrated Device Technology, Inc.
Inventor： Samet Zihir , Tumay Kanar
CPC classification number: H01Q21/205 , H01Q1/26 , H01Q3/28 , H01Q3/36 , H01Q3/46 , H01Q21/0025 , H01Q21/067 , H01Q21/22 , H01Q21/24 , H03F3/195 , H03F3/245 , H03F3/4508 , H03F3/45085 , H03F2200/09 , H03F2200/129 , H03F2200/144 , H03F2200/27 , H03F2200/387 , H03F2200/451 , H03F2203/45116 , H03F2203/45151 , H03F2203/45302 , H03F2203/45394 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H04B1/401 , H04B1/44 , H04B7/0617 , H04B7/0682 , H04B7/0691
Abstract: An apparatus includes a phased array antenna panel and one or more beam former circuits mounted on the phased antenna array panel. The phased array antenna panel generally comprises a plurality of antenna elements arranged in one or more groups. Each of the one or more beam former circuits may be coupled to a respective group of the antenna elements. Each of the one or more beam former circuits may comprise a plurality of transceiver channels. Each transceiver channel generally comprises a power amplifier circuit configured, when operating in a transmit mode, to drive a respective one of the antenna elements. The power amplifier generally comprises a feedback network coupled between an output and an input of the power amplifier circuit.
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公开(公告)号：US20180302045A1
公开(公告)日：2018-10-18
申请号：US16013039
申请日：2018-06-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Shota ISHIHARA , Seiko ONO , Yusuke SHIMAMUNE , Fuminori MORISAWA , Shizuki NAKAJIMA , Yuri HONDA , Kazuhiro KOSHIO , Masato SATO
CPC classification number: H03F3/21 , H03F1/0261 , H03F1/22 , H03F1/34 , H03F3/191 , H03F3/245 , H03F2200/144 , H03F2200/18 , H03F2200/318 , H03F2200/408 , H03F2200/451
Abstract: A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.
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公开(公告)号：US20180248520A1
公开(公告)日：2018-08-30
申请号：US15907302
申请日：2018-02-28
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Ding Li , Shuai Du , Yixing Chu
CPC classification number: H03F1/02 , H03F1/3211 , H03F3/45 , H03F3/45475 , H03F2200/129 , H03F2200/135 , H03F2200/144 , H03F2200/405 , H03F2200/408 , H03F2200/411 , H03F2203/45114 , H03F2203/45116 , H03F2203/45224 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45594
Abstract: A circuit system including an operational amplification circuit is disclosed. The operational amplification circuit includes N stages of operational amplification units that are cascaded, an input terminal of the 1st stage of operational amplification unit is an input terminal of the operational amplification circuit, and an output terminal of the Nth stage of operational amplification unit is an output terminal of the operational amplification circuit; an output terminal of the ith stage of operational amplification unit is connected to an input terminal of the (i+1)th stage of operational amplification unit, so as to provide an input signal for the (i+1)th stage of operational amplification unit; and there is a feedback channel from the output terminal of the Nth stage of operational amplification unit to an input terminal of each of the 1st stage of operational amplification unit to the Nth stage of operational amplification unit.
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Patent Agency Ranking
公开(公告)号：US20180241358A1
公开(公告)日：2018-08-23
申请号：US15801234
申请日：2017-11-01
Inventor： Jeffrey Norwood HARRISON
CPC classification number: H03F1/32 , H03F1/3205 , H03F1/34 , H03F3/19 , H03F3/21 , H03F3/211 , H03F3/245 , H03F2200/129 , H03F2200/144 , H03F2200/411 , H03F2200/451 , H03F2200/537 , H03F2200/541 , H03F2201/3215 , H04B1/04 , H04B2001/0408
Abstract: A linearized power amplifier apparatus includes a number of amplifying stages to amplify a radio-frequency (RF) signal, and a feedback loop including a feedback circuit coupled between an output port of a last amplifying stage and an input port of a first amplifying stage. The feedback loop has a loop gain frequency response that peaks at a frequency approximately equal to a frequency of the RF signal. The feedback loop can provide a linear combination of a feedback signal and the RF signal to the input port of the first amplifying stage.
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公开(公告)号：US20180143068A1
公开(公告)日：2018-05-24
申请号：US15816142
申请日：2017-11-17
Applicant: Sonion Nederland B.V.
Inventor： Adrianus Maria Lafort
CPC classification number: G01H11/06 , H03F1/08 , H03F1/34 , H03F3/181 , H03F3/45183 , H03F3/45215 , H03F2200/129 , H03F2200/144 , H03F2200/171 , H03F2200/258 , H03F2200/42 , H03F2203/45026 , H03F2203/45034 , H03F2203/45512 , H04R3/00
Abstract: A sensing system with an AC feedback to the non-signal and non-biased terminal of the transducer. An impedance element, such as two anti-parallel diodes, are provided at the amplifier input, and the amplifier gain is negative and has a size sufficient to ensure that the input on the one terminal does not exceed the forward voltage of the diode.
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8.发明授权公开(公告)号：US09979350B2
公开(公告)日：2018-05-22
申请号：US14920894
申请日：2015-10-23
Applicant: MEDIATEK INC.
Inventor： Chi-Yao Yu
CPC classification number: H03F1/0205 , H03F1/086 , H03F1/14 , H03F1/42 , H03F1/483 , H03F3/193 , H03F3/45179 , H03F3/45183 , H03F3/45659 , H03F2200/129 , H03F2200/135 , H03F2200/144 , H03F2200/153 , H03F2200/165 , H03F2200/411 , H03F2200/555 , H03F2200/75 , H03F2200/91 , H03F2203/45036 , H03F2203/45051 , H03F2203/45074 , H03F2203/45082 , H03F2203/45088 , H03F2203/45116 , H03F2203/45134 , H03F2203/45151 , H03F2203/45156 , H03F2203/45178 , H03F2203/45188 , H03F2203/45208 , H03F2203/45264 , H03F2203/45332 , H03F2203/45336 , H03F2203/45338 , H03F2203/45418 , H03F2203/45422 , H03F2203/45424 , H03F2203/45434 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45544 , H03F2203/45546 , H03F2203/45548 , H03F2203/45594 , H03F2203/45601 , H03F2203/45631 , H03F2203/45632 , H03F2203/45642 , H03F2203/45644 , H03F2203/45646 , H03F2203/45648 , H03F2203/45702
Abstract: An operational amplifier based circuit has an operational amplifier, a feedback circuit, and a compensation circuit block. The feedback circuit is coupled between an output port and an input port of the operational amplifier. The compensation circuit block has circuits involved in stability compensation of the operational amplifier, wherein there is no stability compensation circuit driven at the output port of the operational amplifier.
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公开(公告)号：US20180123523A1
公开(公告)日：2018-05-03
申请号：US15447718
申请日：2017-03-02
Applicant: QUALCOMM Incorporated
Inventor： Sasha VUJCIC , Mehmet UZUNKOL , Kevin Hsi Huai WANG
CPC classification number: H03F1/26 , H03F1/223 , H03F1/3205 , H03F1/342 , H03F1/565 , H03F3/19 , H03F3/193 , H03F3/245 , H03F2200/135 , H03F2200/144 , H03F2200/294 , H03F2200/387 , H03F2200/451 , H03F2200/492
Abstract: A low noise amplifier (LNA) includes a transconductance device coupled to a cascode transistor. The LNA also includes a resistor capacitor (RC) feedback branch. The RC feedback branch includes a first resistor, a capacitor and a first switch. The RC feedback branch is fed back around the transconductance device and is coupled between a drain of either the cascode transistor or the transconductance device and a gate of the transconductance device.
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10.发明申请METHODS AND APPARATUS FOR REDUCING TRANSIENT GLITCHES IN AUDIO AMPLIFIERS 审中-公开用于减少音频放大器中瞬态玻璃的方法和装置公开(公告)号：US20170063309A1
公开(公告)日：2017-03-02
申请号：US15186273
申请日：2016-06-17
Applicant: QUALCOMM Incorporated
Inventor： Kshitij YADAV , Vijayakumar DHANASEKARAN
CPC classification number: H03F1/26 , H03F1/0277 , H03F1/305 , H03F1/34 , H03F3/183 , H03F3/187 , H03F3/211 , H03F3/213 , H03F3/45475 , H03F3/72 , H03F2200/03 , H03F2200/129 , H03F2200/135 , H03F2200/144 , H03F2200/153 , H03F2200/156 , H03F2200/159 , H03F2200/234 , H03F2200/312 , H03F2200/372 , H03F2200/408 , H03F2200/414 , H03F2200/421 , H03F2200/459 , H03F2203/21109 , H03F2203/45051 , H03F2203/45116 , H03F2203/45118 , H03F2203/45134 , H03F2203/45138 , H03F2203/45156 , H03F2203/45206 , H03F2203/45221 , H03F2203/45264 , H03F2203/45276 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45534 , H03F2203/45546 , H03F2203/45548 , H03F2203/45601 , H03F2203/45616 , H03F2203/45632 , H03F2203/45652 , H03F2203/45682 , H03F2203/45698 , H03F2203/45718 , H03F2203/45726 , H03F2203/7212 , H03F2203/7215 , H03F2203/7224 , H03F2203/7231 , H04B1/40 , H04R3/007
Abstract: An audio amplifier, including: at least a two stage amplifier configured to receive an input signal and output an amplified output signal, the at least a two stage amplifier including at least one stage amplifier and an output stage amplifier; and an auxiliary stage amplifier having an input coupled to an output of the at least one stage amplifier and an input of the output stage amplifier.
Abstract translation: 一种音频放大器，包括：至少两级放大器，被配置为接收输入信号并输出放大的输出信号，所述至少两级放大器包括至少一个级放大器和输出级放大器; 以及辅助级放大器，其具有耦合到所述至少一个级放大器的输出和所述输出级放大器的输入的输入。
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