摘要:
An amplifier circuit comprising: a power amplifier; a bias control circuit coupled to the power amplifier and having a voltage sensor configured to sense a bias voltage to the power amplifier, the bias control circuit being configured to determine whether the bias voltage exceeds a threshold voltage; and a protection circuit coupled to the power amplifier, the bias control circuit being further configured to control the protection circuit to apply a clamping status to limit a power output of the power amplifier to a predetermined value in response to the bias control circuit determining that the bias voltage exceeds a threshold voltage.
摘要:
A close-down pop reduction system and a method for close-down pop reduction in an audio amplifier assembly are disclosed. The switching power conversion system comprises a forward path having a compensator and a switching power stage and a signal path from an output of a comparator in the switching power stage to a sequence control unit. The signal path includes a close-down timing circuit configured to provide a timing signal. The sequence control unit is configured to eliminate the input signal, increase the switch frequency of the close-down pop reduction system and disable the switching power stage at a moment in time within a PWM pulse of the switching power stage. Hereby, it is e.g. possible to minimize the audible pop during close-down of audio amplifier assemblies.
摘要:
A close-down pop reduction system and a method for close-down pop reduction in an audio amplifier assembly are disclosed. The switching power conversion system comprises a forward path having a compensator and a switching power stage and a signal path from an output of a comparator in the switching power stage to a sequence control unit. The signal path includes a close-down timing circuit configured to provide a timing signal. The sequence control unit is configured to eliminate the input signal, increase the switch frequency of the close-down pop reduction system and disable the switching power stage at a moment in time within a PWM pulse of the switching power stage. Hereby, it is e.g. possible to minimize the audible pop during close-down of audio amplifier assemblies.
摘要:
A voltage clamping circuit is provided. In an embodiment, the voltage clamping circuit includes a plurality of gain shifting circuits and a signal processing circuit. The plurality of gain shifting circuits receive an input voltage and voltage levels to generate a plurality of shifted voltages. The signal processing circuit generates a difference value of the plurality of shifted voltages to generate an output voltage according to the difference value, such that the voltage clamping circuit achieves an implementation of a passing band or a rejection of the input voltage.
摘要:
An RF amplifier comprising an input-transistor having an input-transistor-base terminal, an input-transistor-collector terminal and an input-transistor-emitter terminal; a degeneration-component connected between the input-transistor-emitter terminal and a ground terminal; and a protection-transistor having a protection-transistor-base terminal, a protection-transistor-collector terminal and a protection-transistor-emitter terminal. The input-transistor-base terminal is connected to the protection-transistor-emitter terminal, and the protection-transistor-base terminal is connected to the input-transistor-emitter.
摘要:
Provided is an amplifier circuit including an NMOS transistor having a low drain breakdown voltage and an NMOS transistor having a high drain breakdown voltage connected in series thereto, and capable of preventing breakdown of a drain of the NMOS transistor having a low drain breakdown voltage. A clamp circuit configured to limit a drain voltage of the NMOS transistor having a low drain breakdown voltage is connected to the drain thereof.
摘要:
A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the output of the amplifier pair varies proportionally to a change of the power supply.
摘要:
Apparatus and methods for amplifier input protection are provided. In certain implementations, an amplifier input protection circuit includes a first JFET electrically connected between a first input and a first output, and a second JFET electrically connected between a second input and a second output. Additionally, a first clamp is electrically connected to the first output, and a second clamp is electrically connected to the second output. A first current mirror mirrors a current through the first clamp, and provides the mirrored current to a third JFET electrically connected between the first JFET's source and gate. Additionally, a second current mirror that mirrors a current through the second clamp, and provides the mirrored current to a fourth JFET that is electrically connected between a source and gate of the second JFET. Configuring the protection circuit in this manner can provide the benefits of both low noise and low fault current.
摘要:
Self-grounded circuitry (10) includes a signal channel conducting an output voltage (VOUT1). A charge pump (2) powered by a reference voltage (VDD) produces a control voltage (VCP). The control signal is at a low level if the reference voltage is low and is boosted to a high level if the reference voltage is high. A ground switch circuit (15) includes a depletion mode transistor (MP1) having a source coupled to the output voltage, a gate coupled to the control voltage, and a drain coupled to ground. The transistor includes a well region (4-1) and a parasitic substrate diode (D3-1). A negative voltage protection circuit (17-1) includes a depletion mode first protection transistor (MP3-1) having a drain coupled to the well region, a source coupled to a source of a depletion mode second protection transistor (MP4-1) having a drain coupled to the output voltage, the first and second protection transistors each having a gate coupled to the control voltage, and also includes a diode (MN1) coupled to charge the well region from the control voltage conductor to prevent distortion of the output voltage.
摘要:
Provided is an amplifier circuit including an NMOS transistor having a low drain breakdown voltage and an NMOS transistor having a high drain breakdown voltage connected in series thereto, and capable of preventing breakdown of a drain of the NMOS transistor having a low drain breakdown voltage. A clamp circuit configured to limit a drain voltage of the NMOS transistor having a low drain breakdown voltage is connected to the drain thereof.