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    LOW-VOLTAGE DIFFERENTIAL SIGNALING (DIFFERENTIAL SIGNALING) DRIVER CIRCUIT AND METHOD OF ENABLING AND DISABLING A DIFFERENTIAL SIGNALING DRIVER CIRCUIT
    5.
    发明申请
    LOW-VOLTAGE DIFFERENTIAL SIGNALING (DIFFERENTIAL SIGNALING) DRIVER CIRCUIT AND METHOD OF ENABLING AND DISABLING A DIFFERENTIAL SIGNALING DRIVER CIRCUIT 审中-公开
    低电压差分信号（差分信号）驱动电路和启动和禁用差分信号驱动电路的方法

    公开(公告)号：US20160315617A1

    公开(公告)日：2016-10-27

    申请号：US15035544

    申请日：2013-11-28

    申请人： FREESCALE SEMICONDUCTOR, INC.

    发明人： ALEXEY MICHAILOVICH BALASHOV ,  ANDREY EVGENEVICH MALKOV

    IPC分类号： H03K19/0185 ,  H03F1/02 ,  H03F3/45

    CPC分类号： H03K19/018528 ,  H03F1/0222 ,  H03F1/0233 ,  H03F1/223 ,  H03F3/45381 ,  H03F3/45659 ,  H03F3/45946 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45431 ,  H03K19/00361 ,  H03K19/018521

    摘要： A Low-Voltage Differential Signaling (differential signaling) driver circuit (10) comprising enable circuitry for enabling and disabling the differential signaling driver circuit (10) in accordance with an control signal is described. The differential signaling driver circuit (10) comprises: a differential output (12, 13) connected or connectable to a differential signaling receiver circuit via a differential transmission line; current control circuitry (14) for driving a signal current through the differential output (12, 13) in accordance with a driver signal; feedback circuitry (16) for driving the current control circuitry (14) to counteract a difference between a common mode voltage of the differential output (12, 13) and a reference voltage from a reference voltage provider; and the enable circuitry (18). The feedback circuitry (16) comprises a common mode node (20) for providing the common mode voltage (Vcm), a reference input (22) connected or connectable to the reference voltage provider, and a feedback input (24). The enable circuitry (18) is arranged to connect the feedback input (24) to the common mode node (20) when the differential signaling driver circuit (10) is in an enabled state and to the reference voltage provider when the differential signaling driver circuit (10) is in a disabled state. A method of enabling (5.1) and disabling (5.2) a Low-Voltage Differential Signaling (differential signaling) driver circuit (10) is also proposed.

    摘要翻译： 描述了包括使能电路的低电压差分信号（差分信号）驱动器电路（10），用于根据控制信号启用和禁用差分信号驱动器电路（10）。 差分信号驱动器电路（10）包括：差分输出（12,13），经差分传输线路连接或连接到差分信号接收器电路; 电流控制电路（14），用于根据驱动器信号驱动通过差分输出（12,13）的信号电流; 反馈电路（16），用于驱动电流控制电路（14）以抵消差分输出（12,13）的共模电压与参考电压提供器的参考电压之间的差; 和使能电路（18）。 反馈电路（16）包括用于提供共模电压（Vcm）的共模节点（20），连接或可连接到参考电压提供器的参考输入端（22）和反馈输入端（24）。 使能电路（18）被布置成当差分信号驱动器电路（10）处于使能状态时将反馈输入（24）连接到共模节点（20），并且当差分信号驱动器电路 （10）处于禁用状态。 还提出了启用（5.1）和禁用（5.2）低电压差分信号（差分信令）驱动器电路（10）的方法。

    SILICON PHOTONICS MODULATOR DRIVER
    6.
    发明申请
    SILICON PHOTONICS MODULATOR DRIVER 有权
    硅光电调制器驱动器

    公开(公告)号：US20160112016A1

    公开(公告)日：2016-04-21

    申请号：US14698974

    申请日：2015-04-29

    申请人： Cisco Technology, Inc.

    发明人： Kadaba LAKSHMIKUMAR ,  Craig APPEL

    IPC分类号： H03F3/08 ,  H03F1/02 ,  H03F3/45

    CPC分类号： H03F3/08 ,  H03F1/0205 ,  H03F1/086 ,  H03F3/45076 ,  H03F3/45183 ,  H03F3/45659 ,  H03F2200/135 ,  H03F2200/75 ,  H03F2203/45026 ,  H03F2203/45082 ,  H03F2203/45088 ,  H03F2203/45116 ,  H03F2203/45208 ,  H03F2203/45221 ,  H03F2203/45336 ,  H03F2203/45402 ,  H03F2203/45418 ,  H03F2203/45434 ,  H03F2203/45436 ,  H03F2203/45481 ,  H03F2203/45594 ,  H03F2203/45604 ,  H03F2203/45642 ,  H03F2203/45648 ,  H03F2203/45664

    摘要： Embodiments generally relate to a conversion arrangement, a driver arrangement, and a method of producing a complementary complementary metal-oxide-semiconductor (CMOS) output signal for driving a modulator device. The conversion arrangement includes a differential amplifier configured to produce a first amplified signal based on the differential input signal, and at least two transimpedance amplifiers (TIAs) coupled with respective outputs of the differential amplifier and configured to produce a second amplified signal based on the first amplified signal. Respective bias voltages for the TIAs are based on the first amplified signal. The conversion arrangement further includes a common-mode feedback arrangement coupled with outputs of the TIAs and configured to control the first amplified signal based on the second amplified signal, thereby controlling the bias voltages, wherein the complementary CMOS output signal is based on the second amplified signal.

    摘要翻译： 实施例通常涉及转换装置，驱动器装置和产生用于驱动调制器装置的互补金属氧化物半导体（CMOS）输出信号的方法。 转换装置包括：差分放大器，被配置为基于差分输入信号产生第一放大信号，以及至少两个跨阻抗放大器（TIAs），其耦合到差分放大器的相应输出端，并被配置为基于第一信号产生第二放大信号 放大信号。 TIA的相应偏置电压基于第一个放大信号。 转换装置还包括与TIA的输出耦合并配置为基于第二放大信号控制第一放大信号的共模反馈装置，从而控制偏置电压，其中互补CMOS输出信号基于第二放大 信号。

    Method, system, and circuit with a driver output interface having a common mode connection coupled to a transistor bulk connection
    8.
    发明授权
    Method, system, and circuit with a driver output interface having a common mode connection coupled to a transistor bulk connection 有权
    具有驱动器输出接口的方法，系统和电路具有耦合到晶体管体连接的共模连接

    公开(公告)号：US08890601B2

    公开(公告)日：2014-11-18

    申请号：US13294928

    申请日：2011-11-11

    申请人： Miao Li ,  Xiaohua Kong ,  Nam V. Dang

    发明人： Miao Li ,  Xiaohua Kong ,  Nam V. Dang

    IPC分类号： H03B1/00 ,  H03F3/24 ,  H03F3/45 ,  H03F1/22 ,  H03F3/195

    CPC分类号： H03F1/223 ,  H03F3/195 ,  H03F3/245 ,  H03F3/45085 ,  H03F3/45659 ,  H03F2203/45418 ,  H03F2203/45696 ,  H03F2203/45702 ,  H03F2203/45726

    摘要： A multi-terminal output with a common mode connection includes an output having a first terminal and a second terminal and having a common mode connection between the first terminal and the second terminal. A bulk connection of a transistor is coupled to the common mode connection. A first set of control signals and a second set of control signals are generated. Each of the first set of control signals has a first rail voltage level associated with a first power domain. The second set of control signals is generated from the first set of control signals. Each of the second set of control signals has a second rail voltage level that is associated with a second power domain. The second power domain is associated with a common mode voltage of outputs of an output driver.

    摘要翻译： 具有共模连接的多端子输出包括具有第一端子和第二端子的输出端，并且在第一端子和第二端子之间具有共模连接。 晶体管的体连接耦合到共模连接。 产生第一组控制信号和第二组控制信号。 第一组控制信号中的每一个具有与第一功率域相关联的第一导轨电压电平。 第二组控制信号是从第一组控制信号产生的。 第二组控制信号中的每一个具有与第二功率域相关联的第二轨电压电平。 第二功率域与输出驱动器的输出的共模电压相关联。

    HIGH-GAIN LOW-NOISE PREAMPLIFIER AND ASSOCIATED AMPLIFICATION AND COMMON-MODE CONTROL METHOD
    9.
    发明申请
    HIGH-GAIN LOW-NOISE PREAMPLIFIER AND ASSOCIATED AMPLIFICATION AND COMMON-MODE CONTROL METHOD 有权
    高增益低噪声前置放大器和相关放大和共模控制方法

    公开(公告)号：US20140203875A1

    公开(公告)日：2014-07-24

    申请号：US13749488

    申请日：2013-01-24

    申请人： AEROFLEX COLORADO SPRINGS INC.

    发明人： Alfio Zanchi ,  Shinichi Hisano

    IPC分类号： H03F3/45

    CPC分类号： H03F1/26 ,  H03F3/005 ,  H03F3/195 ,  H03F3/45076 ,  H03F3/45183 ,  H03F3/45659 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45112 ,  H03F2203/45116 ,  H03F2203/45402 ,  H03F2203/45408 ,  H03F2203/45631 ,  H03F2203/45702

    摘要： A preamplifier includes a differential pair of transistors receiving a bias current having a differential input and a differential output, a first resistor coupled to a first differential output node, a first transistor having a current path coupled between the first resistor and a power supply, a second resistor coupled to the first differential output node, a second transistor having a current path coupled between the second resistor and the power supply, a third resistor coupled to a second differential output node, a third transistor having a current path coupled between the third resistor and the power supply, a fourth resistor coupled to the second differential output node, and a fourth transistor having a current path coupled between the fourth resistor and the power supply, wherein a source of the second and third transistors are coupled together.

    摘要翻译： 前置放大器包括接收具有差分输入和差分输出的偏置电流的差分对晶体管，耦合到第一差分输出节点的第一电阻器，具有耦合在第一电阻器和电源之间的电流通路的第一晶体管， 耦合到第一差分输出节点的第二电阻器，具有耦合在第二电阻器和电源之间的电流通路的第二晶体管，耦合到第二差分输出节点的第三电阻器，具有耦合在第三电阻器 以及电源，耦合到第二差分输出节点的第四电阻器和耦合在第四电阻器和电源之间的电流通路的第四晶体管，其中第二和第三晶体管的源极耦合在一起。