摘要:
Semiconductor structures and methods of forming the same are provided. A method according to an embodiment includes forming a conductive feature and a first conductive plate over a substrate, conformally depositing a dielectric layer over the conductive feature and the first conductive plate, conformally depositing a conductive layer over the conductive feature and the first conductive plate, and patterning the conductive layer to form a second conductive plate over the first conductive plate and a resistor, the resistor includes a conductive line extending along a sidewall of the conductive feature. By employing the method, a high-resistance resistor may be formed along with a capacitor regardless of the resolution limit of, for example, lithography.
摘要:
A capacitor-resistor-capacitor (CRC) element for active filter realization, which is fully integrable and compatible with MOS technology, is described. The incorporation of the CRC element in a semiconductor integrated circuit active filter also is described. The structure of the CRC filter element is closely analogous to a depletion mode MOS field effect device, except that the channel zone 26 is doped to a level which substantially precludes conductivity modulation at the usual operating voltages. However, the doping level is such as to enable the use of the channel zone as a semiconductor resistance element. Thus, the N-channel CRC element realized in the NMOS technology comprises a first capacitance composed of the gate 27, gate dielectric 38, and resistive channel 26, paralleled by the resistive channel 26 itself constituting a resistor, and then the underlying PN junction capacitance between the N-type resistive channel 26 and the underlying P-type semiconductor body portion 21. An active low-pass filter consists of two CRC elements and an operational amplifier and utilizes the positive feedback principle.
摘要:
A semiconductor device includes a semiconductor substrate having a capacitor region and a resistor region. A capacitor dielectric material and a capacitor electrode are sequentially stacked on an active region in the capacitor region of the semiconductor substrate. A resistor is provided on the resistor region of the semiconductor substrate. A protection pattern is provided on a top surface of the capacitor electrode. The protection pattern is spaced apart from the capacitor electrode. The protection pattern and the resistor include the same material and have the same thickness in a direction vertical to a surface of the semiconductor substrate.
摘要:
A flip chip semiconductor device has a substrate with a plurality of active devices formed thereon. A passive device is formed on the substrate by depositing a first conductive layer over the substrate, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the insulating layer. The passive device is a metal-insulator-metal capacitor. The deposition of the insulating layer and first and second conductive layers is performed without photolithography. An under bump metallization (UBM) layer is formed on the substrate in electrical contact with the plurality of active devices. A solder bump is formed over the UBM layer. The passive device can also be a resistor by depositing a resistive layer over the first conductive layer and depositing a third conductive layer over the resistive layer. The passive device electrically contacts the solder bump.
摘要:
A semiconductor device may be formed with a floating body positioned over an insulator in a semiconductor structure. A gate may be formed over the floating body but spaced therefrom. The semiconductor structure may include doped regions surrounding the floating body The floating body provides a distributed capacitance and resistance along its length to form an integrated RC circuit. The extent of the resistance is a function of the cross-sectional area of the floating body along the source and drain regions and its capacitance is a function of the spacing between the doped regions and the body and between the gate and the body. In some embodiments of the present invention, compensation for input voltage variations may be achieved.
摘要:
An integrated circuit and process for making it wherein a decoupling capacitor is provided beneath devices in the surface of the integrated circuit by the formation of a first epitaxial layer between an N substrate having a P zone diffused therein and an N device-containing epitaxial layer. A P channel diffusion to the P zone formed in the substrate will serve as a damping resistor in combination with the coupling capacitor. The process for forming such a decoupling capacitor in an integrated circuit comprises, inter alia, diffusing P impurities into the substrate to form a large junction which will subsequently function as a decoupling capacitor. A first intrinsic, P or N epitaxial layer is then grown on the semiconductor substrate. Subsequently, an N epitaxial layer is grown on the first epitaxial layer. A P channel is then driven through the N epitaxial layer and the first epitaxial layer to contact the P diffused zone which serves as the decoupling capacitor. This P channel diffusion will serve as a damping resistor in combination with the decoupling capacitor. Device diffusion, i.e., transistors, resistors, etc., will take place into the N epitaxial layer, and during growth of the epitaxial layers the P zone will significantly outdiffuse into the first epitaxial layer. Appropriate channels, isolations and contacts are also provided.
摘要:
DESCRIBED IS A REFLECTIVE PHASE SHIFTER, UTILIZING MICROSTRIP TRANSMISSION LINES, WHICH ALLOWS FOR A CONTINUOUSLY VARIABLE DIFFERENTIAL PHASE SHIFT OVER A GIVEN RANGE. THE BASIC ELEMENTS OF THE DEVICE ARE (1) A MICROSTRIP QUARTERWAVELENGTH PARALLEL-LINE DIRECTIONAL COUPLER FORMED ON A SEMICONDUCTIVE SUBSTRATE AND HAVING THREE OF ITS FOUR ARMS OF SPECIFIC LENGTH AND EITHER OPEN-ENDED OR TERMINATED IN SHORTS, (2) A DISTRIBUTED P-N JUNCTION FORMED IN THE SEMICONDUCTIVE SUBSTRATE IN THE COUPLING REGION BETWEEN THE TWO PARALLEL MICROSTRIPS OF THE COUPLER AND (3) AN EXTERNAL DIRECT CURRENT VOLTAGE SOURCE FOR BIASING THE P-N JUNCTION TO CHANGE THE COUPLING CAPACITANCE BETWEEN THE PARALLEL MICROSTRIPS.
摘要:
A method of making a semiconductor device, includes: providing a first dielectric layer; sequentially forming a first metal layer, a dummy capacitor dielectric layer, and a second metal layer over the first dielectric layer; and using a single mask layer with two patterns to simultaneously recess two portions of the second metal layer so as to define a metal thin film of a resistor and a top metal plate of a capacitor.
摘要:
A flip chip semiconductor device has a substrate with a plurality of active devices formed thereon. A passive device is formed on the substrate by depositing a first conductive layer over the substrate, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the insulating layer. The passive device is a metal-insulator-metal capacitor. The deposition of the insulating layer and first and second conductive layers is performed without photolithography. An under bump metallization (UBM) layer is formed on the substrate in electrical contact with the plurality of active devices. A solder bump is formed over the UBM layer. The passive device can also be a resistor by depositing a resistive layer over the first conductive layer and depositing a third conductive layer over the resistive layer. The passive device electrically contacts the solder bump.
摘要:
A parasitically compensated resistor (50) for integrated circuits includes a substrate (52). A polysilicon resistor (54) is formed in the substrate (52). The polysilicon resistor (54) has a first end connected to a first lead (56) and a second end connected to a second lead (58). A conductive layer (62) is capacitively connected to the polysilicon resistor (54).