公开(公告)号：US09646947B2

公开(公告)日：2017-05-09

申请号：US12644704

申请日：2009-12-22

Applicant: Justin P. Bandholz ,  Pravin Patel ,  Peter R. Seidel

Inventor： Justin P. Bandholz ,  Pravin Patel ,  Peter R. Seidel

IPC: H01L23/00 ,  H01L23/64 ,  H01L25/065 ,  H01L21/66 ,  H01L25/00

CPC classification number: H01L24/48 ,  H01L22/14 ,  H01L22/20 ,  H01L23/645 ,  H01L24/45 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48092 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An integrated circuit (IC) that includes a semiconductor die in an IC package. The semiconductor die includes an electrical endpoint. The IC also includes a pad affixed to the semiconductor die. The pad is characterized by a capacitance and is coupled to the electrical endpoint. The IC also includes a bond wire coupling the pad to an IC package pin. The bond wire is an inductor characterized by an inductance. The inductance is configured to decrease signal degradation caused by the capacitance of the pad on electrical signals transmitted between the pin and the electrical endpoint of the semiconductor die.

公开(公告)号：US20150228610A1

公开(公告)日：2015-08-13

申请号：US14694979

申请日：2015-04-23

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Kevin Moody ,  Parviz Parto

IPC: H01L23/00

CPC classification number: H01L24/49 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/29101 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/49176 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/1033 ,  H01L2924/1206 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/19107 ,  H01L2924/207 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/069 ,  H01L2224/05599 ,  H01L2924/014 ,  H01L2924/0665

Abstract: In one implementation, a power semiconductor package includes a conductive carrier including a switch node segment and a power output segment. The power semiconductor package also includes an integrated output inductor stacked over the conductive carrier and configured to couple the switch node segment to the power output segment. The power semiconductor package further includes a power stage stacked over the integrated output inductor, the power stage including a pulse-width modulation (PWM) control and driver coupled to a control transistor and a sync transistor.

Abstract translation: 在一个实施方式中，功率半导体封装包括包括开关节点段和功率输出段的导电载体。 功率半导体封装还包括堆叠在导电载体上并被配置为将开关节点段耦合到功率输出段的集成输出电感器。 功率半导体封装还包括堆叠在集成输出电感器上的功率级，功率级包括连接到控制晶体管和同步晶体管的脉冲宽度调制（PWM）控制和驱动器。

公开(公告)号：US20150033545A1

公开(公告)日：2015-02-05

申请号：US14445189

申请日：2014-07-29

Applicant: SUMIDA CORPORATION

Inventor： Yasunori MORIMOTO ,  Yoshiyuki HATAYAMA

IPC: G06K19/077 ,  H01Q7/00

CPC classification number: G06K19/07754 ,  G06K19/07779 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/05012 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48092 ,  H01L2224/4813 ,  H01L2224/85205 ,  H01L2224/85801 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01Q7/00 ,  Y10T29/49018 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20756 ,  H01L2924/20755 ,  H01L2224/05599 ,  H01L2924/00

Abstract: Provided is a method of manufacturing an antenna part that can be produced easily and inexpensively, the method comprising the steps of: forming a coil part 11 by a wire material 13 having an insulation coating 16, and removing the insulation coating 16 from both end portions 11a of the coil part 11; forming a connection region 12a of an electrically-conductive metal on the semiconductor substrate 12, and further forming a solder layer 14 on the connection region 12a; wiring the coil part 11 on the connection region 12a so that each end portion 11a of the coil part 11 to be in contact with the solder layer 14; and melting the solder layer 14 by heat to allow each end portions 11a to enter into the solder layer 14, and thus to electrically connect the connection region 12a and the coil part 11 through the solder layer 14.

Abstract translation: 提供一种可以容易且廉价地制造天线部件的方法，该方法包括以下步骤：通过具有绝缘涂层16的线材13形成线圈部分11，并且从两个端部移除绝缘涂层16 11a的线圈部11; 在半导体基板12上形成导电金属的连接区域12a，并且在连接区域12a上进一步形成焊料层14; 将线圈部分11连接在连接区域12a上，使得线圈部分11的与焊料层14接触的每个端部11a; 并通过加热熔化焊料层14，以允许每个端部11a进入焊料层14，从而通过焊料层14将连接区域12a和线圈部分11电连接。

公开(公告)号：US20130323942A1

公开(公告)日：2013-12-05

申请号：US14000322

申请日：2012-01-30

Applicant: Christophe Blondin ,  Christian Neel

Inventor： Christophe Blondin ,  Christian Neel

IPC: H01R13/62 ,  G01R27/26

CPC classification number: H01R13/6205 ,  G01R27/2605 ,  H01L2224/4516 ,  H01L2224/45565 ,  H01L2224/48092 ,  H01L2224/48137 ,  H03K17/691 ,  H03K19/00369

Abstract: A device is provided for interconnecting electronic systems having reference potentials separated by an alternating potential difference, the device includes a plurality of electrical connections that can electrically connect the electronic systems, and inductance coils arranged in series on the electrical connections, the inductance coils being electromagnetically coupled. Als provided is a method for interconnecting electronic systems.

Abstract translation: 提供了一种用于互连具有由交替电位差分开的参考电位的电子系统的装置，该装置包括可以电连接电子系统的多个电连接和串联布置在电连接上的电感线圈，电感线圈是电磁 耦合。 提供的铝是一种用于互连电子系统的方法。

公开(公告)号：US20120073371A1

公开(公告)日：2012-03-29

申请号：US13241665

申请日：2011-09-23

Applicant: Horst Theuss

Inventor： Horst Theuss

IPC: G01P15/105 ,  G01P15/125 ,  G01P15/12 ,  G01P15/00

CPC classification number: G01P15/123 ,  G01P15/11 ,  G01P15/125 ,  G01P15/18 ,  G01P2015/082 ,  G01P2015/0865 ,  G01P2015/0882 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/48227 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In various embodiments, a microelectromechanical system may include a mass element; a substrate; a signal generator; and a fixing structure configured to fix the mass element to the substrate; wherein the mass element is fixed in such a way that, upon an acceleration of the microelectromechanical system, the mass element can be moved relative to the substrate in at least two spatial directions, and wherein a signal is generated by the movement of the mass element by means of the signal generator.

Abstract translation: 在各种实施例中，微机电系统可以包括质量元件; 底物; 信号发生器; 以及固定结构，其构造成将所述质量元件固定到所述基板; 其中所述质量元件被固定为使得在所述微机电系统的加速时，所述质量元件能够在至少两个空间方向上相对于所述衬底移动，并且其中通过所述质量元件的运动产生信号 通过信号发生器。

公开(公告)号：US07751164B1

公开(公告)日：2010-07-06

申请号：US12154706

申请日：2008-05-27

Applicant: Xiaodong Jin ,  Sehat Sutardja ,  Lawrence Tse ,  King Chun Tsai

Inventor： Xiaodong Jin ,  Sehat Sutardja ,  Lawrence Tse ,  King Chun Tsai

IPC: H02H9/00 ,  H02H3/22 ,  H03K17/16

CPC classification number: H01L23/66 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0251 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/484 ,  H01L2224/49113 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A method for reducing a parasitic capacitance of an electrostatic discharge (ESD) protection circuit for an integrated circuit (IC) includes providing an ESD protection circuit including a plurality of transistors; coupling one end of a resistor to a shared drain of the plurality of transistors; and coupling an opposite end of the resistor to at least one of an input pad of the IC, a blocking capacitor of the IC and a transistor in the IC.

Abstract translation: 一种用于降低集成电路（IC）的静电放电（ESD）保护电路的寄生电容的方法包括提供包括多个晶体管的ESD保护电路; 将电阻器的一端耦合到所述多个晶体管的共享漏极; 以及将所述电阻器的相对端耦合到所述IC的输入焊盘，所述IC的隔离电容器和所述IC中的晶体管中的至少一个。

公开(公告)号：US20100155766A1

公开(公告)日：2010-06-24

申请号：US12417656

申请日：2009-04-03

Applicant: CHIN-LONG KU

Inventor： CHIN-LONG KU

IPC: H01L33/00 ,  H01L21/56

CPC classification number: H05B37/0281 ,  F21K9/64 ,  F21V7/22 ,  F21V14/02 ,  F21V23/0442 ,  F21Y2113/13 ,  F21Y2115/10 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0753 ,  H01L25/167 ,  H01L33/483 ,  H01L33/505 ,  H01L33/62 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48092 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/20753 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05B33/0848 ,  Y02B20/42 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An LED includes a bowl-like substrate, three posts embedded within the substrate, an LED die bonded to a middle post, a pair of spiral gold wires interconnecting two electrodes of the LED die and two lateral posts, and an encapsulant sealing the LED die and fixed on the substrate. The two wires are further wound around two columns protruded upwardly from the substrate, respectively. The two columns may be made integrally with the substrate, or be employed as upper portions of the two lateral posts in the case of the two lateral posts extending upwardly beyond the substrate.

Abstract translation: LED包括碗状基板，嵌入基板内的三个柱，与中间柱接合的LED管芯，将LED管芯的两个电极互连的一对螺旋金线和两个侧向柱，以及密封LED管芯的密封剂 并固定在基板上。 两条线分别进一步缠绕在从基板向上突出的两列上。 两个柱可以与基底一体制成，或者在两个横向柱向上延伸超过基底的情况下用作两个侧柱的上部。

公开(公告)号：US07531893B2

公开(公告)日：2009-05-12

申请号：US11458417

申请日：2006-07-19

Applicant: Sreenivasan K. Koduri

Inventor： Sreenivasan K. Koduri

IPC: H01L23/495

CPC classification number: H01L23/495 ,  H01F17/045 ,  H01F27/027 ,  H01F27/40 ,  H01L23/3121 ,  H01L23/49575 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/16 ,  H01L2224/13099 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/49 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An electronic device (100) with one or more semiconductor chips (102) has an inductor (101) assembled on or under the chips. The inductor includes a ferromagnetic body (111) and a wire (104) wrapped around the body to form at least a portion of a loop; the wire ends (104a) are connected to the chips. The assembly is attached to a substrate (103), which may be a leadframe. The device may be encapsulated in molding compound (140) so that the inductor can double as a heat spreader (111c), enhancing the thermal device characteristics.

Abstract translation: 具有一个或多个半导体芯片（102）的电子设备（100）具有组装在芯片上或芯片下的电感器（101）。 所述电感器包括铁磁体（111）和围绕所述主体缠绕以形成环的至少一部分的线（104）; 电线端部（104a）连接到芯片。 组件附接到可以是引线框架的基板（103）。 该装置可以封装在模制化合物（140）中，使得电感器可以作为散热器（111c）加倍，从而增强热装置特性。

公开(公告)号：US20190162370A1

公开(公告)日：2019-05-30

申请号：US16262798

申请日：2019-01-30

Applicant: ZHEJIANG SUPER LIGHTING ELECTRIC APPLIANCE CO., LTD.

Inventor： TAO JIANG ,  LIQIN LI

IPC: F21K9/237 ,  F21K9/232 ,  F21V3/02 ,  F21K9/235 ,  F21V29/70 ,  F21K9/238 ,  F21V9/30

CPC classification number: F21K9/237 ,  F21K9/232 ,  F21K9/235 ,  F21K9/238 ,  F21K9/90 ,  F21V3/02 ,  F21V3/061 ,  F21V3/062 ,  F21V9/30 ,  F21V19/003 ,  F21V29/70 ,  F21Y2103/33 ,  F21Y2103/37 ,  F21Y2107/00 ,  F21Y2115/10 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0753 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/48137 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An LED light bulb includes a bulb shell, a bulb base, a stem, conductive supports, an LED filament, and a supporting arm. The bulb base is connected to the bulb shell. The stem is connected to the bulb base. The conductive supports are connected to the stem. The LED filament includes a filament body and two conductive electrodes. The conductive electrodes are at two ends of the filament body and connected to the conductive supports. The filament body is around the stem. The supporting arm is connected to the stem and the filament body. In a height direction of the LED light bulb, H is a distance from a bottom to a top of the bulb shell. A first height difference is defined between the two conductive electrodes and is from 0 to 1/10H. The filament body is curved to form a highest point and a lowest point. A second height difference is defined between the highest point and the lowest point. The first height difference is less than the second height difference.

公开(公告)号：US09756726B2

公开(公告)日：2017-09-05

申请号：US14071296

申请日：2013-11-04

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Peter Scherl ,  Magdalena Hoier ,  Hans-Joerg Timme

IPC: H05K7/10 ,  H05K7/12 ,  H05K1/11 ,  H05K1/14 ,  H01L23/00 ,  H05K3/36 ,  H05K3/32 ,  H05K3/40

CPC classification number: H05K1/11 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/45015 ,  H01L2224/45028 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45184 ,  H01L2224/4554 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48507 ,  H01L2224/48511 ,  H01L2224/85 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/181 ,  H05K1/111 ,  H05K1/14 ,  H05K3/32 ,  H05K3/36 ,  H05K3/4015 ,  H05K2201/04 ,  H05K2203/0285 ,  Y10T29/49126 ,  H01L2924/00 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00012 ,  H01L2224/48247 ,  H01L2224/43 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An electronic device may comprise a semiconductor element and a wire bond connecting the semiconductor element to a substrate. Using a woven bonding wire may improve the mechanical and electrical properties of the wire bond. Furthermore, there may be a cost benefit. Woven bonding wires may be used in any electronic device, for example in power devices or integrated logic devices.