摘要:
A receiver is set forth that includes a tuner circuit and a converter circuit. The tuner circuit provides an analog signal corresponding to a modulated signal that is received on a selected channel. The converter circuit includes a sample clock that is used to convert the analog signal to a digital signal at a conversion rate corresponding to the frequency of the sample clock. The sample clock is selectable between at least two different clock frequencies.
摘要:
Systems and methods are provided for calibrating the control mechanism in a communication circuit to allow the communication circuit to maintain a desired output power level. The communication circuit includes a variable gain adjustment circuit and a power amplifier, which operate together to provide an output power level. A control circuit controls the variable gain adjustment circuit based on a default gain parameter, a high power threshold, and a low power threshold. A calibration circuit in the control circuit calibrates a default gain parameter to provide a desired output power. A power detector can detect the desired output power level to provide an output power measurement. The calibration circuit calibrates upper and lower power thresholds to provide an acceptable range of power variation around the output power measurement.
摘要:
Apparatus, systems, and methods implementing techniques for reducing spurious components are described. According to one aspect, a wideband polyphase filter filters an input signal that has an associated first frequency. The wideband polyphase filter has poles corresponding to a first filter frequency and a second filter frequency, where the two filter frequencies are different. According to another aspect, a mixer mixes the filtered signal with a local-oscillator signal at a second frequency to produce an upconverted signal, where the second frequency is substantially an integer multiple of the first frequency.
摘要:
An analog signal processing circuit comprises a bias circuit, a first circuit including a control input that communicates with the bias circuit, a first terminal that generates an output current, and a second terminal, and a device that communicates with the second terminal of the first circuit, that includes a variable resistor, and that has a resistance that is modulated in response to an input signal to the analog signal processing circuit.
摘要:
An architecture, circuits, systems and a method for amplifying an analog signal. The architecture and/or circuit generally includes a first fixed stage (e.g., a predriver) and an adjustable stage. The first fixed stage may be configured to amplify an analog signal and provide a first amplified analog output at a first common node. The adjustable stage may comprise a plurality of independently selectable parallel amplifier segments. Each of the parallel segments may have an input at the first common node and an output at a second common node, a transistor having a control terminal, and a first inductor in electrical communication with the control terminal of the transistor. The adjustable stage may be configured to apply a bias to the control terminal of the transistor in a selected segment and to provide an output signal in one of a plurality of a power ranges corresponding to a number of selected parallel amplifier segments. The output signal generally has a minimum power efficiency when two or more of the parallel segments are selected. The present invention advantageously provides a relatively compact power amplifier with an extended output power range at which the amplifier is highly efficient. In preferred embodiments, the input and output matching characteristics are generally independent of the number of selected output amplifier segments.
摘要:
Apparatus, systems, and methods implementing techniques for reducing the variation of a DC offset are described. An input signal is amplified to produce an intermediate signal. The intermediate signal is processed to produce a feedback signal and an output signal, where the output signal has a DC offset that varies with a varying parameter of the circuitry used to process the intermediate signal. Variation of the DC offset of the output signal is reduced using the feedback signal. In one implementation, the circuitry used to process the intermediate signal is a variable-gain amplifier circuit, and the DC offset of the output signal varies with a gain of the variable-gain amplifier.
摘要:
A system for communicating information includes a variable gain amplifier (VGA) responsive to an input signal and a gain control signal for controlling a gain of the VGA. The system also includes a power amplifier responsive to the VGA. An output power level of the power amplifier is compared to a predetermined reference value to generate the gain control signal. The gain control signal is offset by a gain offset value. To change the output power level of the power amplifier from a first output power level to a second output power level, a first predetermined reference value and a first gain offset value associated with the first output power level are changed substantially concurrently to a second predetermined reference value and a second gain offset value, respectively, associated with the second output power level.
摘要:
An input circuit for an integrated circuit (IC), which is mounted on a package having an input pin, rejects signal energy at a first frequency. A first bondwire arranged on the package has one end that communicates with the pin and an opposite end that communicates with components of the IC. A second bondwire located on the package has one end that communicates with the pin and an opposite end that communicates with a capacitance. The capacitance and an inductance of the first and second bondwires resonate at the first frequency to reject signal energy at the first frequency. Bondwires are also used to eliminate external components such as resonant components and impedance matching circuits to reduce cost.
摘要:
A radio frequency (RF) receiver includes a local oscillator (LO) module that receives a control signal and that generates a LO signal at a LO frequency that is based on the control signal, a LO mixer module that generates an intermediate frequency (IF) signal based on a radio frequency (RF) signal and the LO signals, a complex intermediate frequency (IF) mixer module that generates a baseband signal based on the IF signal and an IF oscillator signal, and a channel monitoring module that generates the control signal based on the baseband signal.
摘要:
In a method and system for controlling gain in an RF receiver, an RF signal is analyzed over different attack and decay windows, from which the receiver determines (1) if the signal is in an attack condition with dip values below a threshold level thus indicating a need for increasing signal gain, or (2) if the signal is in a decay condition with threshold values above a threshold level thus indicating a need for decreasing signal gain. The receiver applies attack and decay windows of different sizes and in an asynchronous manner to create a gain control scheme that is insensitive to transient effects such as channel interference and deep fading that affect the intensities of an in-band signal.