公开(公告)号：US20240203864A1

公开(公告)日：2024-06-20

申请号：US18591340

申请日：2024-02-29

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Mark GRISWOLD ,  Michael J. SEDDON

IPC分类号： H01L23/522 ,  H01L21/02 ,  H01L21/786 ,  H01L23/12 ,  H01L23/34

CPC分类号： H01L23/5222 ,  H01L21/0226 ,  H01L21/786 ,  H01L23/12 ,  H01L23/34

摘要： Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.

公开(公告)号：US20230386888A1

公开(公告)日：2023-11-30

申请号：US18317093

申请日：2023-05-15

申请人： STATS ChipPAC Pte. Ltd.

发明人： GunHyuck LEE ,  Yujeong JANG

IPC分类号： H01L21/683 ,  H01L21/56 ,  H01L21/786

CPC分类号： H01L21/6836 ,  H01L21/561 ,  H01L21/786 ,  H01L2221/68331 ,  H01L2221/68381

摘要： A method for making semiconductor devices includes: attaching a substrate with a plurality of electronic components onto a composite tape having an adhesive layer which is sensitive to ultraviolet (UV) irradiation and a UV-transparent base film, wherein the substrate is attached onto the adhesive layer of the composite tape; placing the substrate and the composite tape on a UV-transparent carrier, wherein the UV-transparent carrier is in contact with the UV-transparent base film of the composite tape; singulating the substrate into a plurality of semiconductor devices each having one of the plurality of electronic components; depositing a shielding material on the plurality of semiconductor devices to form a shielding layer on each of the plurality of semiconductor devices; irradiating a UV light to the composite tape through the UV-transparent carrier to reduce adhesivity of the adhesive layer; and detaching the plurality of semiconductor devices from the UV-transparent carrier.

公开(公告)号：US09484324B2

公开(公告)日：2016-11-01

申请号：US14340665

申请日：2014-07-25

申请人： ROHM CO., LTD.

发明人： Toshio Nakasaki

IPC分类号： H01L23/00 ,  H01L21/764 ,  H01L21/304 ,  H01L21/78 ,  H01L21/786 ,  H01L21/683 ,  H01L21/768 ,  H01L23/48 ,  H01L25/18 ,  H01L21/762

CPC分类号： H01L24/97 ,  H01L21/3043 ,  H01L21/6836 ,  H01L21/76224 ,  H01L21/764 ,  H01L21/76898 ,  H01L21/78 ,  H01L21/786 ,  H01L23/481 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L25/18 ,  H01L2221/68327 ,  H01L2224/02313 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/056 ,  H01L2224/06131 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/1412 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83201 ,  H01L2224/8385 ,  H01L2924/01019 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor device includes a first semiconductor chip including a first surface, a second surface and a first terminal arranged on the first surface, a second semiconductor chip including a first surface, a second surface and a second terminal arranged on the first surface of the second semiconductor chip, a support substrate including a first surface bonded to the second surfaces of the first semiconductor chip and the second semiconductor chip, and an isolation groove formed on the first surface of the support substrate. The isolation includes a pair of side surfaces continuously extending from opposing side surfaces of the first semiconductor chip and the second semiconductor chip, respectively, and the isolation groove is formed into the support substrate to extend from the first surface of the support substrate. The isolation groove has a depth less than a thickness of the support substrate.

摘要翻译： 半导体器件包括：第一半导体芯片，包括第一表面，第二表面和布置在第一表面上的第一端子;第二半导体芯片，包括第一表面，第二表面和第二端子，所述第二表面布置在第二表面的第二表面上 半导体芯片，包括结合到第一半导体芯片和第二半导体芯片的第二表面的第一表面的支撑基板，以及形成在支撑基板的第一表面上的隔离槽。 隔离包括分别从第一半导体芯片和第二半导体芯片的相对侧表面连续延伸的一对侧表面，并且隔离槽形成为支撑基板，以从支撑基板的第一表面延伸。 隔离槽的深度小于支撑基板的厚度。

公开(公告)号：US09373610B2

公开(公告)日：2016-06-21

申请号：US14825722

申请日：2015-08-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Wei Lin ,  Ming-Da Cheng ,  Meng-Tse Chen ,  Wen-Hsiung Lu ,  Kuei-Wei Huang ,  Chung-Shi Liu

IPC分类号： H01L21/00 ,  H01L25/00 ,  H01L21/56 ,  H01L25/065 ,  H01L21/786 ,  H01L21/311 ,  H01L23/00 ,  H01L21/3105 ,  H01L25/10 ,  H01L23/538 ,  H01L23/522 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L25/50 ,  H01L21/31051 ,  H01L21/31127 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76885 ,  H01L21/786 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/5226 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02371 ,  H01L2224/02381 ,  H01L2224/03618 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/19 ,  H01L2224/27019 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/82005 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2224/92244 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1047 ,  H01L2225/1058 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00

摘要： A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and the plurality of redistribution lines. A polymer-comprising material is under the inter-layer dielectric. The device die, the die-attach film, and the plurality of Z-interconnects are disposed in the polymer-comprising material.

公开(公告)号：US20160126138A1

公开(公告)日：2016-05-05

申请号：US14926308

申请日：2015-10-29

申请人： DISCO CORPORATION

发明人： Hiroshi Morikazu ,  Motohiko Shimada

IPC分类号： H01L21/78 ,  H01L21/683 ,  H01L21/268

CPC分类号： H01L21/78 ,  H01L21/268 ,  H01L21/67092 ,  H01L21/6836 ,  H01L21/784 ,  H01L21/786 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01S3/10

摘要： A wafer is formed with a plurality of division lines on a front surface of a single crystal substrate having an off angle and formed with devices in a plurality of regions partitioned by the division lines. The wafer is processed by setting a numerical aperture (NA) of a focusing lens for focusing a pulsed laser beam so that a value obtained by dividing the numerical aperture (NA) by a refractive index (N) of the single crystal substrate falls within the range from 0.05 to 0.2. The pulsed laser beam is applied along the division lines, with a focal point of the pulsed laser beam positioned at a desired position from a back surface of the single crystal substrate, so as to form shield tunnels each composed of a pore and a pore-shielding amorphous portion along the division lines from the focal point positioned inside the single crystal substrate.

摘要翻译： 在具有偏角的单晶基板的前表面上形成有多条分割线，并且由分割线划分的多个区域中的器件形成晶片。 通过设置用于聚焦脉冲激光束的聚焦透镜的数值孔径（NA）来处理晶片，使得通过将数值孔径（NA）除以单晶衬底的折射率（N）而获得的值落入 范围从0.05到0.2。 脉冲激光束沿着分割线施加，其中脉冲激光束的焦点位于单晶衬底的背面的期望位置，从而形成每个由孔和孔隙组成的屏蔽通道， 沿着分隔线从位于单晶衬底内的焦点屏蔽非晶部分。

公开(公告)号：US20080265376A1

公开(公告)日：2008-10-30

申请号：US11629861

申请日：2005-07-06

申请人： Takuya Tsurume ,  Koji Dairiki ,  Naoto Kusumoto

发明人： Takuya Tsurume ,  Koji Dairiki ,  Naoto Kusumoto

IPC分类号： H01L29/06 ,  H01L21/304

CPC分类号： H01L21/67132 ,  B32B37/226 ,  B32B38/0004 ,  B32B2305/342 ,  B32B2457/14 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/786 ,  H01L24/27 ,  H01L24/29 ,  H01L24/97 ,  H01L27/1203 ,  H01L27/1255 ,  H01L27/1266 ,  H01L2221/68313 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/83191 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/00

摘要： It is an object of the present invention to decrease a unit cost of an IC chip and to achieve the mass-production of IC chips. According to the present invention, a substrate having no limitation in size, such as a glass substrate, is used instead of a silicon substrate. This achieves the mass-production and the decrease of the unit cost of the IC chip. Further, a thin IC chip is provided by grinding and polishing the substrate such as the glass substrate.

摘要翻译： 本发明的目的是降低IC芯片的单位成本并实现IC芯片的批量生产。 根据本发明，使用诸如玻璃基板等尺寸没有限制的基板来代替硅基板。 这实现了IC芯片的批量生产和单位成本的降低。 此外，通过研磨和研磨诸如玻璃基板的基板来提供薄的IC芯片。

公开(公告)号：US20240222213A1

公开(公告)日：2024-07-04

申请号：US18091943

申请日：2022-12-30

申请人： NVIDIA Corporation

发明人： Ronilo Boja ,  Padam Jain

IPC分类号： H01L23/31 ,  H01L21/683 ,  H01L21/768 ,  H01L21/786 ,  H01L23/00 ,  H01L23/36 ,  H01L23/498 ,  H01L25/10

CPC分类号： H01L23/3121 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/786 ,  H01L23/36 ,  H01L23/49827 ,  H01L24/08 ,  H01L24/16 ,  H01L24/94 ,  H01L25/105 ,  H01L2224/08113 ,  H01L2224/16146 ,  H01L2224/94 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15153

摘要： An integrated circuit package including a package substrate including a monolithic core, the monolithic core having a first substrate side, a second substrate side opposite the first substrate side, a thickness in a range from 800 to 2000 microns and a through-cavity that passes through the first and second substrate sides. The package includes a device module, the device module having a first module side and a second module side opposite the first module side. The device module is embedded in the through-cavity, the first module side is aligned with the first substrate side, the second module side is aligned with the second substrate side, and the device module includes one or more silicon-based passive or silicon-based active device component. A method of manufacture of the integrated circuit package is also disclosed.

公开(公告)号：US11948880B2

公开(公告)日：2024-04-02

申请号：US17937918

申请日：2022-10-04

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Mark Griswold ,  Michael J. Seddon

IPC分类号： H01L21/78 ,  H01L21/02 ,  H01L21/786 ,  H01L23/12 ,  H01L23/34 ,  H01L23/522

CPC分类号： H01L23/5222 ,  H01L21/0226 ,  H01L21/786 ,  H01L23/12 ,  H01L23/34

摘要： Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.

公开(公告)号：US20190237587A1

公开(公告)日：2019-08-01

申请号：US16340422

申请日：2016-12-30

申请人： SHENZHEN ROYOLE TECHNOLOGIES CO., LTD.

发明人： Simon CHEN

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423

CPC分类号： H01L29/78696 ,  G02F1/1368 ,  H01L21/786 ,  H01L27/32 ,  H01L29/06 ,  H01L29/0607 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/786

摘要： A thin film transistor, a method for manufacturing the thin film transistor, and a display device are provided. The thin film transistor includes a substrate, a semiconductor layer, a source electrode, a drain electrode, a gate electrode, an insulating layer, and a number of floating electrodes. The semiconductor layer is formed at the substrate. Two first doped regions are respectively formed at two ends of the semiconductor layer. The source electrode and the drain electrode are respectively disposed at the first doped regions. The gate electrode is disposed between the source electrode and the drain electrode. The semiconductor layer between the gate electrode and the drain electrode forms an offset region. A number of spaced second doped regions is formed at the offset region. The insulating layer covers the offset region without the second doped regions formed thereon. A number of floating electrodes is disposed at the insulating layer.

公开(公告)号：US20180088365A1

公开(公告)日：2018-03-29

申请号：US15117453

申请日：2016-06-20

申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.

发明人： He Zhao ,  Kecheng Xie

IPC分类号： G02F1/13 ,  G02F1/1368 ,  H01L21/768 ,  H01L21/786 ,  H01L21/82 ,  H01L27/12

CPC分类号： G02F1/1309 ,  G02F1/136259 ,  G02F1/1368 ,  G02F2001/136263 ,  H01L21/768 ,  H01L21/786 ,  H01L21/82 ,  H01L27/12

摘要： The present invention provides a broken line repair method of a TFT substrate. The method first finds out a broken line in the TFT substrate and a position of a broken point on the broken line. Then, positions of the passivation layer intersecting with the broken line at two ends of the broken point are processed, respectively to expose a metal layer, where the broken line is. Then, a temporary material layer is covered on the passivation layer and the metal layer which is exposed at the two ends of the broken point. Finally, a metal growing film is formed on the temporary material layer to connect the broken line of the two ends of the broken point. With the temporary material layer, the issue of bad repair result due to the remain of the color resist layer and the folding of the passivation layer can be solved.