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公开(公告)号:US20230268397A1
公开(公告)日:2023-08-24
申请号:US18135206
申请日:2023-04-17
发明人: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC分类号: H01L29/15 , H01L29/778
CPC分类号: H01L29/151 , H01L29/7786
摘要: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
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公开(公告)号:US20230207643A1
公开(公告)日:2023-06-29
申请号:US18113076
申请日:2023-02-23
发明人: Tsung-Mu Yang , Yu-Ren Wang
IPC分类号: H01L29/40 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/66
CPC分类号: H01L29/408 , H01L29/2003 , H01L29/205 , H01L29/7786 , H01L29/66462
摘要: A high electron mobility transistor (HEMT) includes a substrate, a P-type III-V composition layer, a gate electrode and a carbon containing layer. The P-type III-V composition layer is disposed on the substrate, and the gate electrode is disposed on the P-type III-V composition layer. The carbon containing layer is disposed under the P-type III-V composition layer and includes a sunken surface, so as to function like an out diffusion barrier for preventing from the dopant within the P-type III-V composition layer diffusing into the stacked layers underneath during the annealing process.
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公开(公告)号:US11664426B2
公开(公告)日:2023-05-30
申请号:US17685400
申请日:2022-03-03
发明人: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC分类号: H01L29/15 , H01L29/778
CPC分类号: H01L29/151 , H01L29/7786
摘要: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
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公开(公告)号:US20220320292A1
公开(公告)日:2022-10-06
申请号:US17683288
申请日:2022-02-28
发明人: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC分类号: H01L29/15 , H01L29/778
摘要: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
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公开(公告)号:US20220093778A1
公开(公告)日:2022-03-24
申请号:US17100935
申请日:2020-11-22
发明人: Yen-Hsing Chen , Yu-Ming Hsu , Tsung-Mu Yang , Yu-Ren Wang
IPC分类号: H01L29/778 , H01L29/66 , H01L21/67 , H01L21/768
摘要: A high-electron mobility transistor includes a substrate; a channel layer on the substrate; a AlGaN layer on the channel layer; and a P—GaN gate on the AlGaN layer. The AlGaN layer comprises a first region and a second region. The first region has a composition that is different from that of the second region.
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公开(公告)号:US20230020271A1
公开(公告)日:2023-01-19
申请号:US17949241
申请日:2022-09-21
发明人: Yen-Hsing Chen , Yu-Ming Hsu , Tsung-Mu Yang , Yu-Ren Wang
IPC分类号: H01L29/778 , H01L21/768 , H01L29/66 , H01L21/67
摘要: A high-electron mobility transistor includes a substrate; a channel layer on the substrate; a AlGaN layer on the channel layer; and a P—GaN gate on the AlGaN layer. The AlGaN layer comprises a first region and a second region. The first region has a composition that is different from that of the second region.
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公开(公告)号:US11355626B2
公开(公告)日:2022-06-07
申请号:US16574094
申请日:2019-09-18
发明人: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC分类号: H01L29/778 , H01L29/205 , H01L29/267 , H01L29/15 , H01L29/20 , H01L29/04
摘要: An HEMT includes an aluminum gallium nitride layer. A gallium nitride layer is disposed below the aluminum gallium nitride layer. A zinc oxide layer is disposed under the gallium nitride layer. A source electrode and a drain electrode are disposed on the aluminum gallium nitride layer. A gate electrode is disposed on the aluminum gallium nitride layer and between the drain electrode and the source electrode.
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公开(公告)号:US10468502B2
公开(公告)日:2019-11-05
申请号:US16254397
申请日:2019-01-22
发明人: Chun-Liang Kuo , Tsang-Hsuan Wang , Yu-Ming Hsu , Tsung-Mu Yang , Ching-I Li
IPC分类号: H01L29/78 , H01L29/66 , H01L21/02 , H01L21/311 , H01L21/8234 , H01L29/24 , H01L29/16 , H01L29/08 , H01L27/088 , H01L27/11
摘要: A FinFET device includes a substrate, first and second fins, first and second gates and first and second epitaxial layers. The substrate has a first region and a second region. The first and second fins are on the substrate respectively in the first and second regions. In an embodiment, the number of the first fins is different from the number of the second fins. The first and second gates are on the substrate and respectively across the first and second fins. The first epitaxial layers are disposed in first recesses of the first fins adjacent to the first gate. The second epitaxial layers are disposed in second recesses of the second fins adjacent to the second gate. In an embodiment, the maximum width of the first epitaxial layers is L1, the maximum width of the second epitaxial layers is L2, and (L2−L1)/L1 is equal to or less than about 1%.
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公开(公告)号:US20170294508A1
公开(公告)日:2017-10-12
申请号:US15144842
申请日:2016-05-03
发明人: Chih-Kai Hsu , Ssu-I Fu , Yu-Hsiang Hung , Wei-Chi Cheng , Jyh-Shyang Jenq , Tsung-Mu Yang
IPC分类号: H01L29/06 , H01L21/768 , H01L23/535 , H01L29/78 , H01L29/66
CPC分类号: H01L29/0653 , H01L21/28518 , H01L21/76805 , H01L21/76843 , H01L21/76855 , H01L21/76895 , H01L23/485 , H01L23/535 , H01L29/66795 , H01L29/785
摘要: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, and a gate structure is formed on the substrate. Next, a recess is formed adjacent to two sides of the gate structure, and an epitaxial layer is formed in the recess, in which a top surface of the epitaxial layer is lower than a top surface of the substrate. Next, a cap layer is formed on the epitaxial layer, in which a top surface of the cap layer is higher than a top surface of the substrate.
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公开(公告)号:US20150170916A1
公开(公告)日:2015-06-18
申请号:US14108369
申请日:2013-12-17
发明人: Tien-Wei Yu , Chun-Jen Chen , Tsung-Mu Yang , Ming-Hua Chang , Yu-Shu Lin , Chin-Cheng Chien
IPC分类号: H01L21/02
CPC分类号: H01L21/02664 , H01L21/0243 , H01L21/02532 , H01L21/02639 , H01L29/66795 , H01L29/7848
摘要: A semiconductor process includes the steps of providing a substrate with fin structures formed thereon, performing an epitaxy process to grow an epitaxial structure on each fin structure, forming a conformal cap layer on each epitaxial structure, where adjacent conformal cap layers contact each other, and performing an etching process to separate contacting conformal cap layers.
摘要翻译: 一种半导体工艺包括以下步骤:提供具有在其上形成的鳍结构的衬底,执行外延工艺以在每个鳍结构上生长外延结构,在每个外延结构上形成共形盖层,其中相邻的保形盖层彼此接触,以及 执行蚀刻工艺以分离接触的保形盖层。
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