公开(公告)号：US08716068B2

公开(公告)日：2014-05-06

申请号：US14040089

申请日：2013-09-27

Applicant: Texas Instruments Incorporated

Inventor： Darvin R. Edwards ,  Siva P. Gurrum ,  Masood Murtuza ,  Matthew D. Romig ,  Kazunori Hayata

IPC: H01L21/50

CPC classification number: H01L21/56 ,  H01L21/4821 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48639 ,  H01L2224/48739 ,  H01L2224/48839 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/83101 ,  H01L2224/83855 ,  H01L2224/85001 ,  H01L2224/85439 ,  H01L2224/92247 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: In fabricating a semiconductor device first layers are formed of sintered bondable and solderable metal on a carrier strip. The first layers are patterned into first pads and second pads. A set of first pads is surrounding each second pad. The first pads are spaced from the second pad by gaps. The patterned layers are formed of agglomerate metal vertically on the first layers of sintered bondable and solderable metal of the first pads and of the second pad. The second layers are formed of sintered bondable and solderable metal vertically on the layers of agglomerate metal of the first pads.

Abstract translation: 在制造半导体器件中，第一层由载体条上的可烧结的可焊接金属形成。 第一层被图案化成第一衬垫和第二衬垫。 一组第一焊盘围绕每个第二焊盘。 第一焊盘通过间隙与第二焊盘间隔开。 图案化的层由第一焊盘和第二焊盘的可烧结的可焊接和可焊接金属的第一层上垂直形成为聚集体金属。 第二层由可烧结的可焊接和可焊接的金属垂直地形成在第一焊盘的附聚金属层上。

公开(公告)号：US09852979B2

公开(公告)日：2017-12-26

申请号：US15339550

申请日：2016-10-31

Applicant: Texas Instruments Incorporated

Inventor： Matthew D. Romig ,  Frank Stepniak ,  Saumya Gandhi

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528 ,  H01L21/288 ,  H01L21/78 ,  H01L29/02 ,  H01L21/3105 ,  H05K1/18 ,  H05K1/11 ,  H05K1/16 ,  H01L49/02 ,  H01L23/00

CPC classification number: H01L23/5223 ,  H01L21/288 ,  H01L21/31051 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76874 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/14 ,  H01L28/60 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H05K1/113 ,  H05K1/162 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/0187 ,  H05K2201/0215 ,  H05K2201/10734

Abstract: An electronic system comprising an electronic body (301) with terminal pads (310) and at least one capacitor embedded in the electronic body. The capacitor including an insulating and adhesive first polymeric film (302) covering the body surface except the terminal pads; a sheet (320) of high-density capacitive elements, the first capacitor terminal being a metal foil (321) attached to film (302), the second terminal a conductive polymeric compound (324), and the insulator a dielectric skin (323). Sheet (320) has sets of via holes: the first set holes reaching metal foil 321), the second set holes reaching the terminals (310), and the third set holes reaching the conductive polymeric compound (324). An insulating second polymeric film (303) lining the sidewalls of the holes and planarizing the sheet surface; and metal (432) filling the via holes between the polymeric sidewalls and forming conductive traces and attachment pads on the system surface.

公开(公告)号：US09842797B2

公开(公告)日：2017-12-12

申请号：US14071403

申请日：2013-11-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Brian A. Carpenter ,  Christopher Sanzo ,  William T. Harrison ,  Alok Lohia ,  Matthew D. Romig

IPC: H01L23/495 ,  H01L23/00 ,  H01L25/16 ,  H01L25/07

CPC classification number: H01L23/49575 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/074 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40106 ,  H01L2224/40245 ,  H01L2224/4118 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/4917 ,  H01L2224/73221 ,  H01L2224/73253 ,  H01L2224/73255 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/73271 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor switch (first power transistor) attached to the die pad, and a first metal clip attached to one side of the first die. The first metal clip is coupled to at least one package pin. A second die including a second power transistor switch (second power transistor) is attached to another side on the first metal clip. A controller is provided by a controller die attached to a non-conductive layer on the second metal clip on one side of the second die.

公开(公告)号：US20170047283A1

公开(公告)日：2017-02-16

申请号：US15339550

申请日：2016-10-31

Applicant: Texas Instruments Incorporated

Inventor： Matthew D. Romig ,  Frank Stepniak ,  Saumya Gandhi

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528 ,  H01L21/288 ,  H01L21/78 ,  H01L49/02 ,  H01L21/3105

CPC classification number: H01L23/5223 ,  H01L21/288 ,  H01L21/31051 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76874 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/14 ,  H01L28/60 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H05K1/113 ,  H05K1/162 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/0187 ,  H05K2201/0215 ,  H05K2201/10734

Abstract: An electronic system comprising an electronic body (301) with terminal pads (310) and at least one capacitor embedded in the electronic body. The capacitor including an insulating and adhesive first polymeric film (302) covering the body surface except the terminal pads; a sheet (320) of high-density capacitive elements, the first capacitor terminal being a metal foil (321) attached to film (302), the second terminal a conductive polymeric compound (324), and the insulator a dielectric skin (323). Sheet (320) has sets of via holes: the first set holes reaching metal foil 321), the second set holes reaching the terminals (310), and the third set holes reaching the conductive polymeric compound (324). An insulating second polymeric film (303) lining the sidewalls of the holes and planarizing the sheet surface; and metal (432) filling the via holes between the polymeric sidewalls and forming conductive traces and attachment pads on the system surface.

Abstract translation: 一种电子系统，包括具有端子焊盘（310）的电子体（301）和嵌入电子体中的至少一个电容器。 所述电容器包括绝缘和粘合的第一聚合物膜（302），所述绝缘和粘合的第一聚合物膜（302）覆盖除了所述端子焊盘之外 高密度电容元件的片材（320），所述第一电容器端子是附着到膜（302）上的金属箔（321），所述第二端子是导电聚合物（324），所述绝缘体是介电性皮层（323） 。 片（320）具有一组通孔：第一组孔到达金属箔321），第二组孔到达端子（310），第三组孔到达导电聚合物（324）。 绝缘的第二聚合物膜（303），其衬在所述孔的侧壁上并平坦化所述片材表面; 和填充聚合物侧壁之间的通孔的金属（432），并在系统表面上形成导电迹线和附着垫。

公开(公告)号：US20160286654A1

公开(公告)日：2016-09-29

申请号：US14668085

申请日：2015-03-25

Applicant: Texas Instruments Incorporated

Inventor： Matthew D. Romig ,  Frank Stepniak ,  Saumya Gandhi

IPC: H05K1/18

CPC classification number: H01L23/5223 ,  H01L21/288 ,  H01L21/31051 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76874 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/14 ,  H01L28/60 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H05K1/113 ,  H05K1/162 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/0187 ,  H05K2201/0215 ,  H05K2201/10734

Abstract: An electronic system comprising an electronic body (301) with terminal pads (310) and at least one capacitor embedded in the electronic body. The capacitor including an insulating and adhesive first polymeric film (302) covering the body surface except the terminal pads; a sheet (320) of high-density capacitive elements, the first capacitor terminal being a metal foil (321) attached to film (302), the second terminal a conductive polymeric compound (324), and the insulator a dielectric skin (323). Sheet (320) has sets of via holes: the first set holes reaching metal foil 321), the second set holes reaching the terminals (310), and the third set holes reaching the conductive polymeric compound (324). An insulating second polymeric film (303) lining the sidewalls of the holes and planarizing the sheet surface; and metal (432) filling the via holes between the polymeric sidewalls and forming conductive traces and attachment pads on the system surface.

Abstract translation: 一种电子系统，包括具有端子焊盘（310）的电子体（301）和嵌入电子体中的至少一个电容器。 所述电容器包括绝缘和粘合的第一聚合物膜（302），所述绝缘和粘合的第一聚合物膜（302）覆盖除了所述端子焊盘之外 高密度电容元件的片材（320），所述第一电容器端子是附着到膜（302）上的金属箔（321），所述第二端子是导电聚合物（324），所述绝缘体是介电性皮层（323） 。 片（320）具有一组通孔：第一组孔到达金属箔321），第二组孔到达端子（310），第三组孔到达导电聚合物（324）。 绝缘的第二聚合物膜（303），其衬在所述孔的侧壁上并平坦化所述片材表面; 和填充聚合物侧壁之间的通孔的金属（432），并在系统表面上形成导电迹线和附着垫。

公开(公告)号：US20140061884A1

公开(公告)日：2014-03-06

申请号：US14071403

申请日：2013-11-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Brian A. Carpenter ,  Christopher Sanzo ,  William T. Harrison ,  Alok Lohia ,  Matthew D. Romig

IPC: H01L23/495

CPC classification number: H01L23/49575 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/074 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40106 ,  H01L2224/40245 ,  H01L2224/4118 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/4917 ,  H01L2224/73221 ,  H01L2224/73253 ,  H01L2224/73255 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/73271 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor switch (first power transistor) attached to the die pad, and a first metal clip attached to one side of the first die. The first metal clip is coupled to at least one package pin. A second die including a second power transistor switch (second power transistor) is attached to another side on the first metal clip. A controller is provided by a controller die attached to a non-conductive layer on the second metal clip on one side of the second die.

Abstract translation: 堆叠式芯片功率转换器封装包括：引线框架，包括管芯焊盘和多个封装引脚;第一管芯，包括附接到管芯焊盘的第一功率晶体管开关（第一功率晶体管）和附接到一侧的第一金属夹 的第一个死亡。 第一金属夹与至少一个封装销连接。 包括第二功率晶体管开关（第二功率晶体管）的第二裸片附接到第一金属夹的另一侧。 控制器由连接在第二金属夹上的第二金属夹上的非导电层上的控制器芯片提供在第二管芯的一侧上。

公开(公告)号：US09572261B2

公开(公告)日：2017-02-14

申请号：US14668085

申请日：2015-03-25

Applicant: Texas Instruments Incorporated

Inventor： Matthew D. Romig ,  Frank Stepniak ,  Saumya Gandhi

IPC: H05K1/18

CPC classification number: H01L23/5223 ,  H01L21/288 ,  H01L21/31051 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76874 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/14 ,  H01L28/60 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H05K1/113 ,  H05K1/162 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/0187 ,  H05K2201/0215 ,  H05K2201/10734

Abstract: An electronic system comprising an electronic body (301) with terminal pads (310) and at least one capacitor embedded in the electronic body. The capacitor including an insulating and adhesive first polymeric film (302) covering the body surface except the terminal pads; a sheet (320) of high-density capacitive elements, the first capacitor terminal being a metal foil (321) attached to film (302), the second terminal a conductive polymeric compound (324), and the insulator a dielectric skin (323). Sheet (320) has sets of via holes: the first set holes reaching metal foil 321), the second set holes reaching the terminals (310), and the third set holes reaching the conductive polymeric compound (324). An insulating second polymeric film (303) lining the sidewalls of the holes and planarizing the sheet surface; and metal (432) filling the via holes between the polymeric sidewalls and forming conductive traces and attachment pads on the system surface.

Abstract translation: 一种电子系统，包括具有端子焊盘（310）的电子体（301）和嵌入电子体中的至少一个电容器。 所述电容器包括绝缘和粘合的第一聚合物膜（302），所述绝缘和粘合的第一聚合物膜（302）覆盖除了所述端子焊盘之外 高密度电容元件的片材（320），所述第一电容器端子是附着到膜（302）上的金属箔（321），所述第二端子是导电聚合物（324），所述绝缘体是介电性皮层（323） 。 片（320）具有一组通孔：第一组孔到达金属箔321），第二组孔到达端子（310），第三组孔到达导电聚合物（324）。 绝缘的第二聚合物膜（303），其衬在所述孔的侧壁上并平坦化所述片材表面; 和填充聚合物侧壁之间的通孔的金属（432），并在系统表面上形成导电迹线和附着垫。

公开(公告)号：US20140179064A1

公开(公告)日：2014-06-26

申请号：US14189404

申请日：2014-02-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Matthew D. Romig ,  Marie-Solange Milleron

IPC: H01L21/56 ,  H01L23/00

CPC classification number: H01L21/561 ,  B81C1/0023 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/95 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/73265 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00011 ,  H01L2924/10253 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01005 ,  H01L2924/00014

Abstract: A method for fabricating a semiconductor system starts with providing a first component including a first semiconductor chip attached to a pad of a first metal leadframe made of a first metal sheet of high thermal conductivity. A second component including a second semiconductor chip attached to a pad of a second metal leadframe made of a second metal sheet wire-bondable on both surfaces is provided. The second component is encapsulated in a polymeric housing leaving un-encapsulated the lead surfaces facing away from the second chip. The polymeric housing of the second component is attached to the first chip using a layer of low thermal conductivity, whereby the un-encapsulated lead surfaces face away from the first chip. Bonding wires are connected to the un-encapsulated surfaces of the second component leads to the leads of the first component.

Abstract translation: 一种制造半导体系统的方法从提供第一部件开始，该第一部件包括第一半导体芯片，该第一部件附着到由高导热性的第一金属片制成的第一金属引线框的焊盘上。 提供第二部件，其包括附接到第二金属引线框的焊盘的第二半导体芯片，所述第二金属引线框由在两个表面上可焊接的第二金属片制成。 第二部件被封装在聚合物壳体中，从而未引导表面背离第二芯片。 第二部件的聚合物壳体使用低导热性层附接到第一芯片，由此未封装的引线表面远离第一芯片。 接合线连接到第二部件的未封装的表面通向第一部件的引线。

公开(公告)号：US20140038358A1

公开(公告)日：2014-02-06

申请号：US14040089

申请日：2013-09-27

Applicant: Texas Instruments Incorporated

Inventor： Darvin R. Edwards ,  Siva P. Gurrum ,  Masood Murtuza ,  Matthew D. Romig ,  Kazunori HAYATA

IPC: H01L21/56

CPC classification number: H01L21/56 ,  H01L21/4821 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48639 ,  H01L2224/48739 ,  H01L2224/48839 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/83101 ,  H01L2224/83855 ,  H01L2224/85001 ,  H01L2224/85439 ,  H01L2224/92247 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: In fabricating a semiconductor device first layers are formed of sintered bondable and solderable metal on a carrier strip. The first layers are patterned into first pads and second pads. A set of first pads is surrounding each second pad. The first pads are spaced from the second pad by gaps. The patterned layers are formed of agglomerate metal vertically on the first layers of sintered bondable and solderable metal of the first pads and of the second pad. The second layers are formed of sintered bondable and solderable metal vertically on the layers of agglomerate metal of the first pads

Abstract translation: 在制造半导体器件中，第一层由载体条上的可烧结的可焊接金属形成。 第一层被图案化成第一衬垫和第二衬垫。 一组第一焊盘围绕每个第二焊盘。 第一焊盘通过间隙与第二焊盘间隔开。 图案化的层由第一焊盘和第二焊盘的可烧结的可焊接和可焊接金属的第一层上垂直形成为聚集体金属。 第二层由可烧结的可焊接和可焊接的金属垂直地形成在第一焊盘的附聚金属层上