公开(公告)号：US09245970B2

公开(公告)日：2016-01-26

申请号：US14641698

申请日：2015-03-09

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

IPC分类号： H01L29/51 ,  H01L21/02 ,  H01L29/423 ,  H01L29/78 ,  H01L21/28 ,  H01L21/283

CPC分类号： H01L29/513 ,  H01L21/02172 ,  H01L21/022 ,  H01L21/28158 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/78

摘要： A semiconductor structure includes a semiconductor substrate. The semiconductor structure further includes an interfacial layer over the semiconductor substrate, the interfacial layer having a capacitive effective thickness of less than 1.37 nanometers (nm). The semiconductor structure further includes a high-k dielectric layer over the interfacial layer.

摘要翻译： 半导体结构包括半导体衬底。 半导体结构还包括半导体衬底上的界面层，界面层具有小于1.37纳米（nm）的电容有效厚度。 半导体结构还包括界面层上的高k电介质层。

公开(公告)号：US09362123B2

公开(公告)日：2016-06-07

申请号：US13725330

申请日：2012-12-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Liang-Gi Yao ,  I-Ming Chang ,  Yasutoshi Okuno ,  Chih-Hao Chang ,  Shou Zen Chang ,  Clement Hsingjen Wann

IPC分类号： H01L21/20 ,  H01L29/78 ,  H01L27/12 ,  H01L21/28 ,  H01L29/66 ,  H01L29/10 ,  H01L21/02 ,  H01L29/51

CPC分类号： H01L21/2807 ,  H01L21/02381 ,  H01L21/02532 ,  H01L29/1054 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/785

摘要： The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first semiconductor material and a first reactivity; and a low reactivity capping layer of disposed on the semiconductor substrate, wherein the low reactivity capping layer includes a second semiconductor material and a second reactivity less than the first reactivity, the low reactivity capping layer includes silicon germanium Si1-xGex and x is less than about 30%.

摘要翻译： 本公开提供了半导体结构的一个实施例。 半导体结构包括具有第一半导体材料和第一反应性的半导体衬底; 以及设置在所述半导体衬底上的低反应性覆盖层，其中所述低反应性覆盖层包括第二半导体材料和小于所述第一反应性的第二反应性，所述低反应性覆盖层包括硅锗Si1-xGex，并且x小于 约30％。

公开(公告)号：US09922827B2

公开(公告)日：2018-03-20

申请号：US14713211

申请日：2015-05-15

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Liang-Gi Yao ,  Chia-Cheng Chen ,  Ta-Ming Kuan ,  Jeff J. Xu ,  Clement Hsingjen Wann

IPC分类号： H01L21/20 ,  H01L21/02 ,  H01L21/265 ,  H01L29/49 ,  H01L29/51 ,  H01L21/8234 ,  H01L21/28 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/02661 ,  H01L21/26506 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/2822 ,  H01L21/823418 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7848

摘要： A method of cleaning a semiconductor structure includes rotating a semiconductor structure. The method of cleaning further includes cleaning the semiconductor structure with a hydrogen fluoride (HF)-containing gas. A method of forming a semiconductor device includes forming a recess in a source/drain (S/D) region of a transistor. The method of forming further includes cleaning the recess with a HF-containing gas, the HF-containing gas having an oxide removing rate of about 2 nanometer/minute (nm/min) or less. The method of forming further includes epitaxially forming a strain structure in the recess after the cleaning the recess, the strain structure providing a strain to a channel region of the transistor.

公开(公告)号：US20140175513A1

公开(公告)日：2014-06-26

申请号：US13725330

申请日：2012-12-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Liang-Gi Yao ,  I-Ming Chang ,  Yasutoshi Okuno ,  Chih-Hao Chang ,  Shou Zen Chang ,  Clement Hsingien Wann

IPC分类号： H01L29/78 ,  H01L21/02

CPC分类号： H01L21/2807 ,  H01L21/02381 ,  H01L21/02532 ,  H01L29/1054 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/785

摘要： The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first semiconductor material and a first reactivity; and a low reactivity capping layer of disposed on the semiconductor substrate, wherein the low reactivity capping layer includes a second semiconductor material and a second reactivity less than the first reactivity, the low reactivity capping layer includes silicon germanium Si1−xGex and x is less than about 30%.

摘要翻译： 本公开提供了半导体结构的一个实施例。 半导体结构包括具有第一半导体材料和第一反应性的半导体衬底; 以及设置在所述半导体衬底上的低反应性覆盖层，其中所述低反应性覆盖层包括第二半导体材料和小于所述第一反应性的第二反应性，所述低反应性覆盖层包括硅锗Si1-xGex，并且x小于 约30％。

公开(公告)号：US09893160B2

公开(公告)日：2018-02-13

申请号：US14081277

申请日：2013-11-15

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Liang-Gi Yao ,  Chia-Cheng Chen ,  Clement Hsingjen Wann

IPC分类号： H01L21/31 ,  H01L21/469 ,  H01L29/49 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66 ,  H01L21/283 ,  H01L29/78

CPC分类号： H01L29/4983 ,  H01L21/28185 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/49 ,  H01L29/51 ,  H01L29/513 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of fabricating a semiconductor device includes contacting water with a silicon oxide layer. The method further includes diffusing an ozone-containing gas through water to treat the silicon oxide layer. The method further includes forming a dielectric layer over the treated silicon oxide layer.

公开(公告)号：US09385208B2

公开(公告)日：2016-07-05

申请号：US14665612

申请日：2015-03-23

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Kun-Yu Lee ,  Liang-Gi Yao ,  Yasutoshi Okuno ,  Clement Hsingjen Wann

IPC分类号： H01L29/78 ,  H01L29/51 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/513 ,  H01L21/28185 ,  H01L21/28194 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/78 ,  H01L29/7833

摘要： A semiconductor device includes a substrate and a gate structure over the substrate. The gate structure includes a dielectric portion and an electrode portion that is disposed over the dielectric portion. The dielectric portion includes a carbon-doped high dielectric constant (high-k) dielectric layer over the substrate and a carbon-free high-k dielectric layer adjacent to the electrode portion.

摘要翻译： 半导体器件包括衬底和衬底上的栅极结构。 栅极结构包括电介质部分和设置在电介质部分上方的电极部分。 电介质部分包括在衬底上的碳掺杂高介电常数（高k）电介质层和邻近电极部分的无碳高k电介质层。

公开(公告)号：US09006056B2

公开(公告)日：2015-04-14

申请号：US13904586

申请日：2013-05-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

IPC分类号： H01L21/8249 ,  H01L29/78 ,  H01L21/28 ,  H01L29/51 ,  H01L21/283

CPC分类号： H01L29/513 ,  H01L21/02172 ,  H01L21/022 ,  H01L21/28158 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/78

摘要： A method of performing an ultraviolet (UV) curing process on an interfacial layer over a semiconductor substrate, the method includes supplying a gas flow rate ranging from 10 standard cubic centimeters per minute (sccm) to 5 standard liters per minute (slm), wherein the gas comprises inert gas. The method further includes heating the interfacial layer at a temperature less than or equal to 700° C. Another method of performing an annealing process on an interfacial layer over a semiconductor substrate, the second method includes supplying a gas flow rate ranging from 10 sccm to 5 slm, wherein the gas comprises inert gas. The method further includes heating the interfacial layer at a temperature less than or equal to 600° C.

摘要翻译： 一种在半导体衬底上的界面层上进行紫外线（UV）固化过程的方法，该方法包括将每分钟10标准立方厘米（sccm）的气体流速提供到5标准升/分钟（slm），其中 气体包括惰性气体。 该方法还包括在小于或等于700℃的温度下加热界面层。在半导体衬底上的界面层上进行退火处理的另一种方法，第二种方法包括将10sccm的气体流速提供给 5slm，其中气体包括惰性气体。 该方法还包括在小于或等于600℃的温度下加热界面层。

公开(公告)号：US20150062561A1

公开(公告)日：2015-03-05

申请号：US14017079

申请日：2013-09-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Liang-Gi Yao ,  Yasutoshi Okuno ,  Wei-Shan Hu ,  Yusuke Oniki ,  Ling-Yen Yeh ,  Clement Hsingjen Wann

IPC分类号： G01N21/65 ,  G01Q30/02

CPC分类号： G01N21/65 ,  G01N21/658 ,  G01Q30/02

摘要： A method includes performing a first probing on a sample integrated circuit structure to generate a first Raman spectrum. During the first probing, a first laser beam having a first wavelength is projected on the sample integrated circuit structure. The method further includes performing a second probing on the sample integrated circuit structure to generate a second Raman spectrum, wherein a Tip-Enhanced Raman Scattering (TERS) method is used to probe the sample integrated circuit structure. During the second probing, a second laser beam having a second wavelength different from the first wavelength is projected on the sample integrated circuit structure. A stress in a first probed region of the sample integrated circuit structure is then from the first Raman spectrum and the second Raman spectrum.

摘要翻译： 一种方法包括对采样集成电路结构执行第一探测以产生第一拉曼光谱。 在第一次探测期间，具有第一波长的第一激光束投射在样品集成电路结构上。 该方法还包括在样本集成电路结构上执行第二探测以产生第二拉曼光谱，其中使用尖端增强拉曼散射（TERS）方法来探测样本集成电路结构。 在第二次探测期间，具有与第一波长不同的第二波长的第二激光束投射在样本集成电路结构上。 然后，样品集成电路结构的第一探测区域中的应力来自第一拉曼光谱和第二拉曼光谱。

公开(公告)号：US20140315360A1

公开(公告)日：2014-10-23

申请号：US14317980

申请日：2014-06-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Ting Liu ,  Liang-Gi Yao ,  Yasutoshi Okuno ,  Clement Hsingjen Wann

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L21/28

CPC分类号： H01L21/823842 ,  H01L21/28008 ,  H01L21/28079 ,  H01L21/28088 ,  H01L27/092 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A multi-layer scavenging metal gate stack, and methods of manufacturing the same, are disclosed. In an example, a gate stack disposed over a semiconductor substrate includes an interfacial dielectric layer disposed over the semiconductor substrate, a high-k dielectric layer disposed over the interfacial dielectric layer, a first conductive layer disposed over the high-k dielectric layer, and a second conductive layer disposed over the first conductive layer. The first conductive layer includes a first metal layer disposed over the high-k dielectric layer, a second metal layer disposed over the first metal layer, and a third metal layer disposed over the second metal layer. The first metal layer includes a material that scavenges oxygen impurities from the interfacial dielectric layer, and the second metal layer includes a material that adsorbs oxygen impurities from the third metal layer and prevents oxygen impurities from diffusing into the first metal layer.

摘要翻译： 公开了一种多层扫气金属栅叠层及其制造方法。 在一个示例中，设置在半导体衬底上的栅极堆叠包括设置在半导体衬底上的界面电介质层，设置在界面电介质层上的高k电介质层，设置在高k电介质层上的第一导电层，以及 设置在所述第一导电层上的第二导电层。 第一导电层包括设置在高k电介质层上的第一金属层，设置在第一金属层上的第二金属层和设置在第二金属层上的第三金属层。 第一金属层包括从界面电介质层清除氧杂质的材料，第二金属层包括从第三金属层吸附氧杂质并防止氧杂质扩散到第一金属层中的材料。

公开(公告)号：US09257349B2

公开(公告)日：2016-02-09

申请号：US14317980

申请日：2014-06-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Ting Liu ,  Liang-Gi Yao ,  Yasutoshi Okuno ,  Clement Hsingjen Wann

IPC分类号： H01L21/8238 ,  H01L21/28 ,  H01L29/49 ,  H01L27/092 ,  H01L29/51

CPC分类号： H01L21/823842 ,  H01L21/28008 ,  H01L21/28079 ,  H01L21/28088 ,  H01L27/092 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A multi-layer scavenging metal gate stack, and methods of manufacturing the same, are disclosed. In an example, a gate stack disposed over a semiconductor substrate includes an interfacial dielectric layer disposed over the semiconductor substrate, a high-k dielectric layer disposed over the interfacial dielectric layer, a first conductive layer disposed over the high-k dielectric layer, and a second conductive layer disposed over the first conductive layer. The first conductive layer includes a first metal layer disposed over the high-k dielectric layer, a second metal layer disposed over the first metal layer, and a third metal layer disposed over the second metal layer. The first metal layer includes a material that scavenges oxygen impurities from the interfacial dielectric layer, and the second metal layer includes a material that adsorbs oxygen impurities from the third metal layer and prevents oxygen impurities from diffusing into the first metal layer.

摘要翻译： 公开了一种多层扫气金属栅叠层及其制造方法。 在一个示例中，设置在半导体衬底上的栅极堆叠包括设置在半导体衬底上的界面电介质层，设置在界面电介质层上的高k电介质层，设置在高k电介质层上的第一导电层，以及 设置在所述第一导电层上的第二导电层。 第一导电层包括设置在高k电介质层上的第一金属层，设置在第一金属层上的第二金属层和设置在第二金属层上的第三金属层。 第一金属层包括从界面电介质层清除氧杂质的材料，第二金属层包括从第三金属层吸附氧杂质并防止氧杂质扩散到第一金属层中的材料。