公开(公告)号：US20200373267A1

公开(公告)日：2020-11-26

申请号：US16989461

申请日：2020-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Fu Shih ,  Chun-Yen Lo ,  Cheng-Lin Huang ,  Wen-Ming Chen ,  Chien-Ming Huang ,  Yuan-Fu Liu ,  Yung-Chiuan Cheng ,  Wei-Chih Huang ,  Chen-Hsun Liu ,  Chien-Pin Chan ,  Yu-Nu Hsu ,  Chi-Hung Lin ,  Te-Hsun Pang ,  Chin-Yu Ku

IPC: H01L23/00 ,  C25D5/12 ,  C25D5/50 ,  C25D7/12 ,  C25D17/00 ,  C25D17/12 ,  C25D21/10

Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

公开(公告)号：US11527504B2

公开(公告)日：2022-12-13

申请号：US16989461

申请日：2020-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Fu Shih ,  Chun-Yen Lo ,  Cheng-Lin Huang ,  Wen-Ming Chen ,  Chien-Ming Huang ,  Yuan-Fu Liu ,  Yung-Chiuan Cheng ,  Wei-Chih Huang ,  Chen-Hsun Liu ,  Chien-Pin Chan ,  Yu-Nu Hsu ,  Chi-Hung Lin ,  Te-Hsun Pang ,  Chin-Yu Ku

IPC: H01L23/00 ,  C25D5/12 ,  C25D5/50 ,  C25D7/12 ,  C25D17/12 ,  C25D21/10 ,  C25D17/00 ,  H01L23/31 ,  C25D3/12 ,  C25D3/38 ,  C25D3/60

Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

公开(公告)号：US20240395571A1

公开(公告)日：2024-11-28

申请号：US18790969

申请日：2024-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ying-Hao Wang ,  Chien-Lung Chen ,  Chien-Chi Tzeng ,  Meng-Fu Shih ,  Hu-Wei Lin

IPC: H01L21/67 ,  H01L21/677

Abstract: An apparatus for cleaning a package device is provided. The apparatus includes a package device loader; a package device unloader; a first cleaning area disposed between the package device loader and the package device unloader; and a conveyor. The conveyor includes a frame extending from the package device loader to the package device unloader and through the first cleaning area; and a belt wrapping the frame, wherein the belt includes a movable upper surface between the package device loader and the package device unloader, wherein the movable upper surface is configured to move relative to and over the frame, and a first distance between the movable upper surface and the frame in the first cleaning area increases in a direction from the package device loader to the package device unloader.

公开(公告)号：US20230377910A1

公开(公告)日：2023-11-23

申请号：US17751185

申请日：2022-05-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ying-Hao Wang ,  Chien-Lung Chen ,  Chien-Chi Tzeng ,  Meng-Fu Shih ,  Hu-Wei Lin

IPC: H01L21/67 ,  H01L21/677

CPC classification number: H01L21/67051 ,  H01L21/67121 ,  H01L21/67706 ,  H01L21/67742

Abstract: An apparatus for cleaning a package device is provided. The apparatus includes a package device loader; a package device unloader; a first cleaning area disposed between the package device loader and the package device unloader; and a conveyor. The conveyor includes a frame extending from the package device loader to the package device unloader and through the first cleaning area; and a belt wrapping the frame, wherein the belt includes a movable upper surface between the package device loader and the package device unloader, wherein the movable upper surface is configured to move relative to and over the frame, and a first distance between the movable upper surface and the frame in the first cleaning area increases in a direction from the package device loader to the package device unloader.

公开(公告)号：US10014218B1

公开(公告)日：2018-07-03

申请号：US15492525

申请日：2017-04-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Fu Shih ,  Cheng-Lin Huang ,  Chien-Chen Li ,  Che-Jung Chu ,  Wen-Ming Chen ,  Kuo-Chio Liu

IPC: H01L23/48 ,  H01L21/78 ,  H01L23/00 ,  H01L23/544 ,  H01L21/56 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/486 ,  H01L21/561 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L2223/5446 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/11011 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13011 ,  H01L2224/13013 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/16146 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/3003 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2224/11 ,  H01L21/304

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor structure. The semiconductor structure has a central portion and a peripheral portion surrounding the central portion. The method includes forming first conductive bumps and dummy conductive bumps over a surface of the semiconductor structure. The first conductive bumps are over the central portion and electrically connected to the semiconductor structure. The dummy conductive bumps are over the peripheral portion and electrically insulated from the semiconductor structure. The first conductive bumps each have a first thickness and a first width. The dummy conductive bumps each have a second thickness and a second width. The second thickness is less than the first thickness. The second width is greater than the first width.