公开(公告)号：US20200373267A1

公开(公告)日：2020-11-26

申请号：US16989461

申请日：2020-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Fu Shih ,  Chun-Yen Lo ,  Cheng-Lin Huang ,  Wen-Ming Chen ,  Chien-Ming Huang ,  Yuan-Fu Liu ,  Yung-Chiuan Cheng ,  Wei-Chih Huang ,  Chen-Hsun Liu ,  Chien-Pin Chan ,  Yu-Nu Hsu ,  Chi-Hung Lin ,  Te-Hsun Pang ,  Chin-Yu Ku

IPC: H01L23/00 ,  C25D5/12 ,  C25D5/50 ,  C25D7/12 ,  C25D17/00 ,  C25D17/12 ,  C25D21/10

Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

公开(公告)号：US10811377B2

公开(公告)日：2020-10-20

申请号：US16194927

申请日：2018-11-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Hung Chen ,  Yu-Nu Hsu ,  Chun-Chen Liu ,  Heng-Chi Huang ,  Chien-Chen Li ,  Shih-Yen Chen ,  Cheng-Nan Hsieh ,  Kuo-Chio Liu ,  Chen-Shien Chen ,  Chin-Yu Ku ,  Te-Hsun Pang ,  Yuan-Feng Wu ,  Sen-Chi Chiang

IPC: H01L23/20 ,  H01L23/498 ,  H01L23/00

Abstract: A package structure is provided. The package structure includes a first bump structure formed over a substrate, a solder joint formed over the first bump structure and a second bump structure formed over the solder joint. The first bump structure includes a first pillar layer formed over the substrate and a first barrier layer formed over the first pillar layer. The first barrier layer has a first protruding portion which extends away from a sidewall surface of the first pillar layer, and a distance between the sidewall surface of the first pillar layer and a sidewall surface of the first barrier layer is in a range from about 0.5 μm to about 3 μm. The second bump structure includes a second barrier layer formed over the solder joint and a second pillar layer formed over the second barrier layer, wherein the second barrier layer has a second protruding portion which extends away from a sidewall surface of the second pillar layer.

公开(公告)号：US20190131251A1

公开(公告)日：2019-05-02

申请号：US15866472

申请日：2018-01-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Rung-De Wang ,  Chen-Hsun Liu ,  Chin-Yu Ku ,  Te-Hsun Pang ,  Chia-Hua Wang ,  Pei-Shing Tsai ,  Po-Chang Lin

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L21/768 ,  H01L23/31

Abstract: A semiconductor structure includes a semiconductor device, a first seal ring, a second seal ring, and a plurality of through semiconductor vias (TSV). The semiconductor device has a first surface and a second surface opposite to the first surface. The first seal ring is disposed on the first surface of the semiconductor device and is adjacent to edges of the first surface. The second seal ring is disposed on the second surface of the semiconductor device and is adjacent to edges of the second surface. The TSVs penetrate through the semiconductor device and physically connect the first seal ring and the second seal ring.

公开(公告)号：US10276514B1

公开(公告)日：2019-04-30

申请号：US15866472

申请日：2018-01-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Rung-De Wang ,  Chen-Hsun Liu ,  Chin-Yu Ku ,  Te-Hsun Pang ,  Chia-Hua Wang ,  Pei-Shing Tsai ,  Po-Chang Lin

IPC: H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L21/768 ,  H01L21/782 ,  H01L21/784 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L21/8238

Abstract: A semiconductor structure includes a semiconductor device, a first seal ring, a second seal ring, and a plurality of through semiconductor vias (TSV). The semiconductor device has a first surface and a second surface opposite to the first surface. The first seal ring is disposed on the first surface of the semiconductor device and is adjacent to edges of the first surface. The second seal ring is disposed on the second surface of the semiconductor device and is adjacent to edges of the second surface. The TSVs penetrate through the semiconductor device and physically connect the first seal ring and the second seal ring.

公开(公告)号：US10818612B2

公开(公告)日：2020-10-27

申请号：US16372436

申请日：2019-04-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Rung-De Wang ,  Chen-Hsun Liu ,  Chin-Yu Ku ,  Te-Hsun Pang ,  Chia-Hua Wang ,  Pei-Shing Tsai ,  Po-Chang Lin

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L21/768 ,  H01L23/31 ,  H01L21/683 ,  H01L23/58 ,  H01L21/78 ,  H01L21/782 ,  H01L21/784 ,  H01L21/8238 ,  H01L23/498 ,  H01L23/538

Abstract: A manufacturing method of a semiconductor structure includes at least the following steps. A semiconductor device having a first surface and a second surface opposite to the first surface is provided. A plurality of through semiconductor vias (TSV) embedded in the semiconductor device is formed. A first seal ring is formed over the first surface of the semiconductor device. The first seal ring is adjacent to edges of the first surface and is physically in contact with the TSVs. A second seal ring is formed over the second surface of the semiconductor device. The second seal ring is adjacent to edges of the second surface and is physically in contact with the TSVs.

公开(公告)号：US11527504B2

公开(公告)日：2022-12-13

申请号：US16989461

申请日：2020-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Fu Shih ,  Chun-Yen Lo ,  Cheng-Lin Huang ,  Wen-Ming Chen ,  Chien-Ming Huang ,  Yuan-Fu Liu ,  Yung-Chiuan Cheng ,  Wei-Chih Huang ,  Chen-Hsun Liu ,  Chien-Pin Chan ,  Yu-Nu Hsu ,  Chi-Hung Lin ,  Te-Hsun Pang ,  Chin-Yu Ku

IPC: H01L23/00 ,  C25D5/12 ,  C25D5/50 ,  C25D7/12 ,  C25D17/12 ,  C25D21/10 ,  C25D17/00 ,  H01L23/31 ,  C25D3/12 ,  C25D3/38 ,  C25D3/60

Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

公开(公告)号：US20190371741A1

公开(公告)日：2019-12-05

申请号：US16372436

申请日：2019-04-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Rung-De Wang ,  Chen-Hsun Liu ,  Chin-Yu Ku ,  Te-Hsun Pang ,  Chia-Hua Wang ,  Pei-Shing Tsai ,  Po-Chang Lin

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/31 ,  H01L21/768 ,  H01L23/522 ,  H01L23/48

Abstract: A manufacturing method of a semiconductor structure includes at least the following steps. A semiconductor device having a first surface and a second surface opposite to the first surface is provided. A plurality of through semiconductor vias (TSV) embedded in the semiconductor device is formed. A first seal ring is formed over the first surface of the semiconductor device. The first seal ring is adjacent to edges of the first surface and is physically in contact with the TSVs. A second seal ring is formed over the second surface of the semiconductor device. The second seal ring is adjacent to edges of the second surface and is physically in contact with the TSVs.