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公开(公告)号:US20220328690A1
公开(公告)日:2022-10-13
申请号:US17849995
申请日:2022-06-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yao-Jen Chang , Chih-Chien Chi , Chen-Yuan Kao , Hung-Wen Su , Kai-Shiang Kuo , Po-Cheng Shih , Jun-Yi Ruan
IPC: H01L29/78 , H01L29/66 , H01L23/522 , H01L23/528 , H01L21/768 , H01L23/532 , H01L21/8238 , H01L27/092
Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
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公开(公告)号:US11854878B2
公开(公告)日:2023-12-26
申请号:US17066706
申请日:2020-10-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Huei-Wen Hsieh , Kai-Shiang Kuo , Cheng-Hui Weng , Chun-Sheng Chen , Wen-Hsuan Chen
IPC: H01L25/065 , H01L25/00 , H01L21/768 , H01L23/00 , H01L23/532 , H01L23/31 , H01L23/528 , H01L23/522 , H01L27/088
CPC classification number: H01L21/76882 , H01L21/7684 , H01L21/76846 , H01L21/76862 , H01L23/5226 , H01L23/5283 , H01L23/53238 , H01L27/0886
Abstract: A method of forming a semiconductor device includes forming an opening in a dielectric layer, and forming a barrier layer in the opening. A combined liner layer is formed over the barrier layer by first forming a first liner layer over the barrier layer, and forming a second liner layer over the first liner layer, such that the first liner layer and the second liner layer intermix. A conductive material layer is formed over the combined liner layer, and a thermal process is performed to reflow the conductive material layer.
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公开(公告)号:US20220367265A1
公开(公告)日:2022-11-17
申请号:US17873941
申请日:2022-07-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Huei-Wen Hsieh , Kai-Shiang Kuo , Cheng-Hui Weng , Chun-Sheng Chen , Wen-Hsuan Chen
IPC: H01L21/768 , H01L23/528 , H01L23/522 , H01L23/532
Abstract: A method of forming a semiconductor device includes forming an opening in a dielectric layer, and forming a barrier layer in the opening. A combined liner layer is formed over the barrier layer by first forming a first liner layer over the barrier layer, and forming a second liner layer over the first liner layer, such that the first liner layer and the second liner layer intermix. A conductive material layer is formed over the combined liner layer, and a thermal process is performed to reflow the conductive material layer.
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公开(公告)号:US20210074581A1
公开(公告)日:2021-03-11
申请号:US17099263
申请日:2020-11-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chou , Chih-Chien Chi , Chung-Chi Ko , Yao-Jen Chang , Chen-Yuan Kao , Kai-Shiang Kuo , Po-Cheng Shih , Tze-Liang Lee , Jun-Yi Ruan
IPC: H01L21/768 , H01L23/532 , H01L21/8234 , H01L21/84 , H01L29/66 , H01L23/522 , H01L23/528 , H01L29/78
Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
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公开(公告)号:US12166128B2
公开(公告)日:2024-12-10
申请号:US18360344
申请日:2023-07-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yao-Jen Chang , Chih-Chien Chi , Chen-Yuan Kao , Hung-Wen Su , Kai-Shiang Kuo , Po-Cheng Shih , Jun-Yi Ruan
IPC: H01L21/00 , H01L21/768 , H01L21/8238 , H01L23/522 , H01L23/528 , H01L23/532 , H01L27/092 , H01L29/66 , H01L29/78
Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
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公开(公告)号:US20240395617A1
公开(公告)日:2024-11-28
申请号:US18790994
申请日:2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Huei-Wen Hsieh , Kai-Shiang Kuo , Cheng-Hui Weng , Chun-Sheng Chen , Wen-Hsuan Chen
IPC: H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532 , H01L27/088
Abstract: A method of forming a semiconductor device includes forming an opening in a dielectric layer, and forming a barrier layer in the opening. A combined liner layer is formed over the barrier layer by first forming a first liner layer over the barrier layer, and forming a second liner layer over the first liner layer, such that the first liner layer and the second liner layer intermix. A conductive material layer is formed over the combined liner layer, and a thermal process is performed to reflow the conductive material layer.
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公开(公告)号:US20230369500A1
公开(公告)日:2023-11-16
申请号:US18360344
申请日:2023-07-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yao-Jen Chang , Chih-Chien Chi , Chen-Yuan Kao , Hung-Wen Su , Kai-Shiang Kuo , Po-Cheng Shih , Jun-Yi Ruan
IPC: H01L29/78 , H01L29/66 , H01L21/768 , H01L23/532 , H01L23/528 , H01L23/522 , H01L27/092 , H01L21/8238
CPC classification number: H01L29/7851 , H01L29/66545 , H01L29/66795 , H01L21/76816 , H01L23/5329 , H01L23/528 , H01L23/5226 , H01L21/76804 , H01L27/0924 , H01L21/823821
Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
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公开(公告)号:US11777035B2
公开(公告)日:2023-10-03
申请号:US17849995
申请日:2022-06-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yao-Jen Chang , Chih-Chien Chi , Chen-Yuan Kao , Hung-Wen Su , Kai-Shiang Kuo , Po-Cheng Shih , Jun-Yi Ruan
IPC: H01L21/00 , H01L29/78 , H01L29/66 , H01L23/522 , H01L23/528 , H01L21/768 , H01L23/532 , H01L21/8238 , H01L27/092
CPC classification number: H01L29/7851 , H01L21/76804 , H01L21/76816 , H01L21/823821 , H01L23/528 , H01L23/5226 , H01L23/5329 , H01L27/0924 , H01L29/66545 , H01L29/66795
Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
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公开(公告)号:US09812397B2
公开(公告)日:2017-11-07
申请号:US14587019
申请日:2014-12-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Kai-Shiang Kuo , Ken-Yu Chang , Ya-Lien Lee , Hung-Wen Su
IPC: H01L21/768 , H01L23/532 , H01L21/285
CPC classification number: H01L23/53238 , H01L21/2855 , H01L21/28562 , H01L21/768 , H01L21/76802 , H01L21/76843 , H01L21/76846 , H01L21/76867 , H01L21/76877 , H01L23/53223 , H01L23/53252 , H01L23/53266 , H01L2924/0002 , H01L2924/00
Abstract: In a method of fabricating a semiconductor device, an opening is formed inside a dielectric layer above a semiconductor substrate. The opening has a wall. At least one diffusion barrier material is then formed over the wall of the opening by at least two alternating steps, which are selected from the group consisting of a process of physical vapor deposition (PVD) and a process of atomic layer deposition (ALD). A liner layer is formed over the at least one diffusion barrier material.
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公开(公告)号:US20240395939A1
公开(公告)日:2024-11-28
申请号:US18790280
申请日:2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yao-Jen Chang , Chih-Chien Chi , Chen-Yuan Kao , Hung-Wen Su , Kai-Shiang Kuo , Po-Cheng Shih , Jun-Yi Ruan
IPC: H01L29/78 , H01L21/768 , H01L21/8238 , H01L23/522 , H01L23/528 , H01L23/532 , H01L27/092 , H01L29/66
Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
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