公开(公告)号：US10535670B2

公开(公告)日：2020-01-14

申请号：US15054100

申请日：2016-02-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Hsuan Liu ,  Chiang-Ming Chuang ,  Chih-Ming Lee ,  Kun-Tsang Chuang ,  Hung-Che Liao ,  Chia-Ming Pan ,  Hsin-Chi Chen

IPC: H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L27/11521 ,  H01L21/28 ,  H01L27/11531 ,  H01L27/11541 ,  H01L21/3213 ,  H01L27/11519 ,  H01L29/66

Abstract: A method of manufacturing a non-volatile memory is described. A substrate including a first region and a second region located at periphery of the first region is provided. A plurality of stacked structures are formed on the first region of the substrate. A wall structure is formed on the second region of the substrate. A conductive layer is formed over the substrate. A bottom anti-reflective coating is formed over the conductive layer. The bottom anti-reflective coating and the conductive layer are etched back. The conductive layer is patterned.

公开(公告)号：US20170250188A1

公开(公告)日：2017-08-31

申请号：US15054100

申请日：2016-02-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Hsuan Liu ,  Chiang-Ming Chuang ,  Chih-Ming Lee ,  Kun-Tsang Chuang ,  Hung-Che Liao ,  Chia-Ming Pan ,  Hsin-Chi Chen

IPC: H01L27/115 ,  H01L21/3213 ,  H01L29/423 ,  H01L21/28 ,  H01L29/66 ,  H01L29/788

Abstract: A method of manufacturing a non-volatile memory is described. A substrate including a first region and a second region located at periphery of the first region is provided. A plurality of stacked structures are formed on the first region of the substrate. A wall structure is formed on the second region of the substrate. A conductive layer is formed over the substrate. A bottom anti-reflective coating is formed over the conductive layer. The bottom anti-reflective coating and the conductive layer are etched back. The conductive layer is patterned.

公开(公告)号：US09768182B2

公开(公告)日：2017-09-19

申请号：US15158517

申请日：2016-05-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chiang-Ming Chuang ,  Chien-Hsuan Liu ,  Chih-Ming Lee ,  Kun-Tsang Chuang ,  Hung-Che Liao ,  Hsin-Chi Chen

IPC: H01L27/11 ,  H01L27/11521 ,  H01L23/535 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L27/11521 ,  G11C16/0408 ,  H01L23/535 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/11575 ,  H01L29/0649 ,  H01L29/42328

Abstract: A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, at least one memory cell, and at least one word line. The raised dummy feature is present on the semiconductor substrate and defines a cell region on the semiconductor substrate. The memory cell is present on the cell region. The word line is present adjacent to the memory cell.

公开(公告)号：US09110386B2

公开(公告)日：2015-08-18

申请号：US14300499

申请日：2014-06-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jen-Pan Wang ,  Chien-Hsuan Liu ,  Ching-Hsien Chen ,  Chao-Chi Chen

IPC: G03F7/20 ,  G03F9/00

CPC classification number: G03F7/70641 ,  G03F7/70341 ,  G03F9/7026 ,  G03F9/7034 ,  G03F9/7053

Abstract: A method comprises providing a semiconductor substrate having at least one layer of a material over the substrate. A sound is applied to the substrate, such that a sound wave is reflected by a top surface of the layer of material The sound wave is detected using a sensor. A topography of the top surface is determined based on the detected sound wave. The determined topography is used to control an immersion lithography process.

Abstract translation: 一种方法包括提供在衬底上具有至少一层材料的半导体衬底。 对基板施加声音，使得声波被材料层的顶表面反射。使用传感器检测声波。 基于检测到的声波来确定顶面的形貌。 确定的地形用于控制浸没光刻工艺。

公开(公告)号：US11925017B2

公开(公告)日：2024-03-05

申请号：US16740499

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Hsuan Liu ,  Chiang-Ming Chuang ,  Chih-Ming Lee ,  Kun-Tsang Chuang ,  Hung-Che Liao ,  Chia-Ming Pan ,  Hsin-Chi Chen

IPC: H10B41/50 ,  H01L21/28 ,  H01L21/3213 ,  H01L29/423 ,  H01L29/66 ,  H01L29/788 ,  H10B41/10 ,  H10B41/30 ,  H10B41/42 ,  H10B41/47

CPC classification number: H10B41/30 ,  H01L21/32135 ,  H01L29/40114 ,  H01L29/42328 ,  H01L29/66825 ,  H01L29/7883 ,  H10B41/10 ,  H10B41/42 ,  H10B41/47

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.

公开(公告)号：US20200152648A1

公开(公告)日：2020-05-14

申请号：US16740499

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Hsuan Liu ,  Chiang-Ming Chuang ,  Chih-Ming Lee ,  Kun-Tsang Chuang ,  Hung-Che Liao ,  Chia-Ming Pan ,  Hsin-Chi Chen

IPC: H01L27/11521 ,  H01L29/788 ,  H01L29/66 ,  H01L29/423 ,  H01L27/11519 ,  H01L21/3213 ,  H01L21/28 ,  H01L27/11531 ,  H01L27/11541

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.

公开(公告)号：US09059126B1

公开(公告)日：2015-06-16

申请号：US14139514

申请日：2013-12-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Hsuan Liu ,  Chao-Chi Chen

IPC: H01L27/088 ,  H01L23/367 ,  H01L49/02 ,  H01L29/06 ,  H01L23/373 ,  H01L21/02 ,  H01L21/324 ,  H01L21/8234

CPC classification number: H01L21/823481 ,  H01L21/324 ,  H01L27/0802 ,  H01L27/088 ,  H01L28/20 ,  H01L29/0649

Abstract: Embodiments of mechanisms for forming a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate having a first device region and a second device region. The semiconductor device structure further includes first devices in the first device region and second devices in the second device region. The semiconductor device structure also includes a first annular structure continuously surrounding the first device region and a second annular structure continuously surrounding the second device region. The first annular structure has a first thermal diffusion coefficient less than a second thermal diffusion coefficient of the second annular structure.

Abstract translation: 提供了用于形成半导体器件结构的机构的实施例。 半导体器件结构包括具有第一器件区域和第二器件区域的半导体衬底。 半导体器件结构还包括第一器件区域中的第一器件和第二器件区域中的第二器件。 半导体器件结构还包括连续围绕第一器件区域的第一环形结构和连续围绕第二器件区域的第二环形结构。 第一环形结构具有小于第二环形结构的第二热扩散系数的第一热扩散系数。