公开(公告)号：US09947753B2

公开(公告)日：2018-04-17

申请号：US14842680

申请日：2015-09-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chi-Cheng Hung ,  Kei-Wei Chen ,  Yu-Sheng Wang ,  Ming-Ching Chung ,  Chia-Yang Wu

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/768 ,  H01L29/08 ,  H01L29/165 ,  H01L21/285 ,  H01L23/485 ,  H01L29/49

CPC classification number: H01L29/41725 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76855 ,  H01L23/485 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

Abstract: A semiconductor structure includes a semiconductor substrate, at least one dielectric layer, a dielectric spacer liner (DSL) layer, and at least one conductor. The dielectric layer is present on the semiconductor substrate. The dielectric layer has at least one contact hole exposing at least a portion of the semiconductor substrate. The semiconductor substrate has at least one recess communicating with the contact hole. The recess has a bottom surface and at least one sidewall. The DSL layer is present on at least the sidewall of the recess. The conductor is present at least partially in the contact hole and is electrically connected to the semiconductor substrate.

公开(公告)号：US11031488B2

公开(公告)日：2021-06-08

申请号：US16852973

申请日：2020-04-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko Jangjian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/768 ,  H01L21/762 ,  H01L21/285 ,  H01L29/49 ,  H01L29/165

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a transistor over a substrate. The semiconductor device structure includes a dielectric structure over the substrate and covering the transistor. The semiconductor device structure includes a contact structure passing through the dielectric structure and electrically connected to the transistor. The contact structure includes a contact layer, a first barrier layer, and a second barrier layer, the first barrier layer surrounds the contact layer, the second barrier layer surrounds a first upper portion of the first barrier layer, a first lower portion of the first barrier layer is in direct contact with the dielectric structure, and a thickness of the first lower portion increases toward the substrate.

公开(公告)号：US10886226B2

公开(公告)日：2021-01-05

申请号：US16050191

申请日：2018-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko JangJian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L23/532 ,  H01L29/417 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/311

Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.

公开(公告)号：US10714576B2

公开(公告)日：2020-07-14

申请号：US15954458

申请日：2018-04-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chi-Cheng Hung ,  Kei-Wei Chen ,  Yu-Sheng Wang ,  Ming-Ching Chung ,  Chia-Yang Wu

IPC: H01L21/768 ,  H01L21/285 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L29/08 ,  H01L29/165 ,  H01L23/485 ,  H01L29/49

Abstract: A device includes an epitaxy structure having a recess therein, a dielectric layer over the epitaxy structure, the dielectric layer having a contact hole communicating with the recess, a dielectric spacer liner (DSL) layer on a sidewall of the recess, a barrier layer on the DSL layer, and a conductor. The DSL layer has an opening. The DSL layer extends further into the epitaxy structure than the barrier layer. The conductor is disposed in the contact hole and electrically connected to the epitaxy feature through the opening of the DSL layer.

公开(公告)号：US10763338B2

公开(公告)日：2020-09-01

申请号：US15690693

申请日：2017-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko Jang-Jian ,  Ting-Chun Wang ,  Chuan-Pu Liu

IPC: H01L29/45 ,  H01L29/66 ,  H01L21/768 ,  H01L21/326 ,  H01L21/285 ,  H01L29/78 ,  H01L29/417 ,  H01L29/165 ,  H01L29/08 ,  H01L21/02

Abstract: The present disclosure describes a silicide formation process which employs the formation of an amorphous layer in the SiGe S/D region via an application of a substrate bias voltage during a metal deposition process. For example, the method includes a substrate with a gate structure disposed thereon and a source/drain region adjacent to the gate structure. A dielectric is formed over the gate structure and the source-drain region. A contact opening is formed in the dielectric to expose a portion of the gate structure and a portion of the source/drain region. An amorphous layer is formed in the exposed portion of the source/drain region with a thickness and a composition which is based on an adjustable bias voltage applied to the substrate. Further, an anneal is performed to form a silicide on the source/drain region.

公开(公告)号：US20200043858A1

公开(公告)日：2020-02-06

申请号：US16050191

申请日：2018-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko JangJian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L23/532 ,  H01L29/417 ,  H01L21/768 ,  H01L21/3213

Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.

公开(公告)号：US20240379557A1

公开(公告)日：2024-11-14

申请号：US18782167

申请日：2024-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko JangJian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L23/532 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/417

Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.

公开(公告)号：US11929328B2

公开(公告)日：2024-03-12

申请号：US17140654

申请日：2021-01-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko JangJian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L23/532 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/417

CPC classification number: H01L23/53266 ,  H01L21/32135 ,  H01L21/76804 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76865 ,  H01L29/41725 ,  H01L21/31111 ,  H01L21/31116

Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.

公开(公告)号：US20240079332A1

公开(公告)日：2024-03-07

申请号：US18504714

申请日：2023-11-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko JangJian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L23/532 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/417

CPC classification number: H01L23/53266 ,  H01L21/32135 ,  H01L21/76804 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76865 ,  H01L29/41725 ,  H01L21/31116

Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.

公开(公告)号：US11670690B2

公开(公告)日：2023-06-06

申请号：US16926671

申请日：2020-07-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chi-Cheng Hung ,  Kei-Wei Chen ,  Yu-Sheng Wang ,  Ming-Ching Chung ,  Chia-Yang Wu

IPC: H01L29/417 ,  H01L29/08 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78 ,  H01L21/768 ,  H01L21/285 ,  H01L23/485 ,  H01L29/49

CPC classification number: H01L29/41725 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76831 ,  H01L23/485 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848 ,  H01L21/76843 ,  H01L21/76855 ,  H01L29/4966

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a first source/drain region, a second source/drain region, first source/drain contact and a first dielectric spacer liner. The gate structure is over the semiconductor substrate. The first source/drain region and the second source/drain region are in the semiconductor substrate and respectively on opposite sides of the gate structure. The first source/drain contact is over the first source/drain region. The first dielectric spacer liner lines a sidewall of the first source/drain contact and extends into the first source/drain region.