公开(公告)号：US12046634B2

公开(公告)日：2024-07-23

申请号：US18158148

申请日：2023-01-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Shuen-Shin Liang ,  Sung-Li Wang ,  Hsu-Kai Chang ,  Chia-Hung Chu ,  Chien-Shun Liao ,  Yi-Ying Liu

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/0665 ,  H01L29/1033 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66742

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and methods of fabricating the same are disclosed. The semiconductor device includes first and second S/D regions, a nanostructured channel region disposed between the first and second S/D regions, a gate structure surrounding the nanostructured channel region, first and second contact structures disposed on first surfaces of the first and second S/D regions, a third contact structure disposed on a second surface of the first S/D region, and an etch stop layer disposed on a second surface of the second S/D region. The third contact structure includes a metal silicide layer, a silicide nitride layer disposed on the metal silicide layer, and a conductive layer disposed on the silicide nitride layer.

公开(公告)号：US11894437B2

公开(公告)日：2024-02-06

申请号：US17320553

申请日：2021-05-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chih-Chien Chi ,  Chien-Shun Liao ,  Keng-Chu Lin ,  Kai-Ting Huang ,  Sung-Li Wang ,  Yi-Ying Liu ,  Chia-Hung Chu ,  Hsu-Kai Chang ,  Cheng-Wei Chang

IPC: H01L29/45 ,  H01L23/535 ,  H01L23/532 ,  H01L29/78 ,  H01L21/768

CPC classification number: H01L29/45 ,  H01L21/7684 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76882 ,  H01L21/76895 ,  H01L23/535 ,  H01L23/53209 ,  H01L29/7851

Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.

公开(公告)号：US20220367662A1

公开(公告)日：2022-11-17

申请号：US17876313

申请日：2022-07-28

Applicant: Taiwan Semiconductor Manufacturing, Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chun-I Tsai ,  Chih-Wei Chang ,  Chun-Hsien Huang ,  Hung-Yi Huang ,  Keng-Chu Lin ,  Ken-Yu Chang ,  Sung-Li Wang ,  Chia-Hung Chu ,  Hsu-Kai Chang

IPC: H01L29/45 ,  H01L23/535 ,  H01L21/768

Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes forming a liner-free conductive structure on a cobalt conductive structure disposed on a substrate, depositing a cobalt layer on the liner-free conductive structure and exposing the liner-free conductive structure to a heat treatment. The method further includes removing the cobalt layer from the liner-free conductive structure.

公开(公告)号：US20210233861A1

公开(公告)日：2021-07-29

申请号：US16936335

申请日：2020-07-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsu-Kai Chang ,  Keng-Chu Lin ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Chia-Hung Chu

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768

Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes depositing an etch stop layer on a cobalt contact disposed on a substrate, depositing a dielectric on the etch stop layer, etching the dielectric and the etch stop layer to form an opening that exposes a top surface of the cobalt contact, and etching the exposed top surface of the cobalt contact to form a recess in the cobalt contact extending laterally under the etch stop layer. The method further includes depositing a ruthenium metal to substantially fill the recess and the opening, and annealing the ruthenium metal to form an oxide layer between the ruthenium metal and the dielectric.

公开(公告)号：US09097972B2

公开(公告)日：2015-08-04

申请号：US13752954

申请日：2013-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chen Lin ,  Ching-Hsin Chang ,  Chia-Hung Chu ,  Hu-Wei Lin ,  Chih-Hsien Hsu ,  Hong-Hsing Chou

IPC: H01L21/36 ,  G03F7/038 ,  G03F7/039 ,  G03F7/16

CPC classification number: G03F7/0387 ,  G03F7/039 ,  G03F7/162

Abstract: A method comprises dispensing a first solvent on a semiconductor substrate; dispensing a first layer of a high-viscosity polymer on the first solvent; dispensing a second solvent on the first layer of high-viscosity polymer; and spinning the semiconductor substrate after dispensing the second solvent, so as to spread the high-viscosity polymer to a periphery of the semiconductor substrate.

Abstract translation: 一种方法包括在半导体衬底上分配第一溶剂; 在第一溶剂上分配第一层高粘度聚合物; 在第一层高粘度聚合物上分配第二溶剂; 并且在分配第二溶剂之后旋转半导体衬底，以将高粘度聚合物扩散到半导体衬底的周围。

公开(公告)号：US12148807B2

公开(公告)日：2024-11-19

申请号：US17371245

申请日：2021-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hung Chu ,  Ding-Kang Shih ,  Keng-Chu Lin ,  Pang-Yen Tsai ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Tsungyu Hung ,  Hsu-Kai Chang

IPC: H01L29/417 ,  H01L21/285 ,  H01L29/40 ,  H01L29/423

Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.

公开(公告)号：US20240379425A1

公开(公告)日：2024-11-14

申请号：US18781296

申请日：2024-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Yu Lai ,  Chin-Szu Lee ,  Szu-Hua Wu ,  Shuen-Shin Liang ,  Chia-Hung Chu ,  Keng-Chu Lin ,  Sung-Li Wang

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/40 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66

Abstract: A method includes forming a device region over a substrate; forming a first dielectric layer over the device region; forming an opening in the first dielectric layer; conformally depositing a first conductive material along sidewalls and bottom surfaces of the opening; depositing a second conductive material on the first conductive material to fill the opening, wherein the second conductive material is different from the first conductive material; and performing a first thermal process to form an interface region extending from a first region of the first conductive material to a second region of the second conductive material, wherein the interface region includes a homogeneous mixture of the first conductive material and the second conductive material.

公开(公告)号：US11581259B2

公开(公告)日：2023-02-14

申请号：US16950537

申请日：2020-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Chien-Shun Liao ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Shu-Lan Chang ,  Yi-Ying Liu ,  Chia-Hung Chu ,  Hsu-Kai Chang

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768

Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.

公开(公告)号：US20230029002A1

公开(公告)日：2023-01-26

申请号：US17577707

申请日：2022-01-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Chin Chang ,  Lin-Yu Huang ,  Shuen-Shin Liang ,  Sheng-Tsung Wang ,  Cheng-Chi Chuang ,  Chia-Hung Chu ,  Tzu Pei Chen ,  Yuting Cheng ,  Sung-Li Wang

IPC: H01L21/768 ,  H01L23/535

Abstract: The present disclosure describes a semiconductor device with a nitrided capping layer and methods for forming the same. One method includes forming a first conductive structure in a first dielectric layer on a substrate, depositing a second dielectric layer on the first conductive structure and the first dielectric layer, and forming an opening in the second dielectric layer to expose the first conductive structure and a portion of the first dielectric layer. The method further includes forming a nitrided layer on a top portion of the first conductive structure, a top portion of the portion of the first dielectric layer, sidewalls of the opening, and a top portion of the second dielectric layer, and forming a second conductive structure in the opening, where the second conductive structure is in contact with the nitrided layer.

公开(公告)号：US11158539B2

公开(公告)日：2021-10-26

申请号：US16589941

申请日：2019-10-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sung-Li Wang ,  Hung-Yi Huang ,  Yu-Yun Peng ,  Mrunal A. Khaderbad ,  Chia-Hung Chu ,  Shuen-Shin Liang ,  Keng-Chu Lin

IPC: H01L21/768 ,  H01L21/265 ,  H01L23/532 ,  H01L23/535

Abstract: A method includes receiving a structure having a dielectric layer over a conductive feature; etching a hole through the dielectric layer and exposing the conductive feature; depositing a first metal into the hole and in direct contact with the dielectric layer and the conductive feature; depositing a second metal over the first metal; and annealing the structure including the first and the second metals.