公开(公告)号：US20230290842A1

公开(公告)日：2023-09-14

申请号：US18317538

申请日：2023-05-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Hong-Ming Wu ,  Chen-Yuan Kao ,  Li-Hsiang Chao ,  Yi-Ying Liu

IPC: H01L29/417 ,  H01L23/522 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/40 ,  H01L23/538

CPC classification number: H01L29/41775 ,  H01L23/5221 ,  H01L21/76859 ,  H01L21/823475 ,  H01L23/5226 ,  H01L21/76877 ,  H01L29/401 ,  H01L23/5386

Abstract: A method according to the present disclosure includes receiving a workpiece including a gate structure, a first source/drain (S/D) feature, a second S/D feature, a first dielectric layer over the gate structure, the first S/D feature, the second S/D feature, a first S/D contact over the first S/D feature, a second S/D contact over the second S/D feature, a first etch stop layer (ESL) over the first dielectric layer, and a second dielectric layer over the first ESL, forming a S/D contact via through the second dielectric layer and the first ESL to couple to the first S/D contact, forming a gate contact opening through the second dielectric layer, the first ESL, and the first dielectric layer to expose the gate structure, and forming a common rail opening adjoining the gate contact opening to expose the second S/D contact, and forming a common rail contact in the common rail opening.

公开(公告)号：US11670499B2

公开(公告)日：2023-06-06

申请号：US17205847

申请日：2021-03-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Min-Hsiu Hung ,  Chun-I Tsai ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/02 ,  H01L21/768

CPC classification number: H01L21/02068 ,  H01L21/76877

Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.

公开(公告)号：US11563083B2

公开(公告)日：2023-01-24

申请号：US17162587

申请日：2021-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Shuen-Shin Liang ,  Sung-Li Wang ,  Hsu-Kai Chang ,  Chia-Hung Chu ,  Chien-Shun Liao ,  Yi-Ying Liu

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/417 ,  H01L29/10

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and methods of fabricating the same are disclosed. The semiconductor device includes first and second S/D regions, a nanostructured channel region disposed between the first and second S/D regions, a gate structure surrounding the nanostructured channel region, first and second contact structures disposed on first surfaces of the first and second S/D regions, a third contact structure disposed on a second surface of the first S/D region, and an etch stop layer disposed on a second surface of the second S/D region. The third contact structure includes a metal silicide layer, a silicide nitride layer disposed on the metal silicide layer, and a conductive layer disposed on the silicide nitride layer.

公开(公告)号：US20230016515A1

公开(公告)日：2023-01-19

申请号：US17875675

申请日：2022-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Chien-Shun Liao ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Shu-Lan Chang ,  Yi-Ying Liu ,  Chia-Hung Chu ,  Hsu-Kai Chang

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768

Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.

公开(公告)号：US11295956B2

公开(公告)日：2022-04-05

申请号：US16887218

申请日：2020-05-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Kao-Feng Lin ,  Min-Hsiu Hung ,  Yi-Hsiang Chao ,  Huang-Yi Huang ,  Yu-Ting Lin

IPC: H01L21/285 ,  H01L21/28 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/49

Abstract: The present disclosure relates to a method for fabricating a semiconductor structure. The method includes providing a substrate with a gate structure, an insulating structure over the gate structure, and a S/D region; depositing a titanium silicide layer over the S/D region with a first chemical vapor deposition (CVD) process. The first CVD process includes a first hydrogen gas flow. The method also includes depositing a titanium nitride layer over the insulating structure with a second CVD process. The second CVD process includes a second hydrogen gas flow. The first and second CVD processes are performed in a single reaction chamber and a flow rate of the first hydrogen gas flow is higher than a flow rate of the second hydrogen gas flow.

公开(公告)号：US11257712B2

公开(公告)日：2022-02-22

申请号：US15931111

申请日：2020-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Yu-Ming Huang ,  Ethan Tseng ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/768 ,  H01L29/08 ,  H01L29/04 ,  H01L29/161 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66 ,  H01L21/02 ,  H01L21/285 ,  H01L29/78

Abstract: A method includes providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature; etching a hole into the one or more dielectric layer to expose a portion of the epitaxial source/drain feature; forming a silicide layer over the portion of the epitaxial source/drain feature; forming a conductive barrier layer over the silicide layer; and applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N2 gas and H2 gas and is performed at a temperature that is at least 300° C.

公开(公告)号：US11232945B2

公开(公告)日：2022-01-25

申请号：US17036734

申请日：2020-09-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Min-Hsiu Hung ,  Hung-Yi Huang ,  Chun Chieh Wang ,  Yu-Ting Lin

IPC: H01L21/762 ,  H01L21/02 ,  H01L23/532 ,  H01L21/768 ,  H01L21/8238 ,  H01L21/285 ,  H01L21/8234

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process.

公开(公告)号：US10714334B2

公开(公告)日：2020-07-14

申请号：US15860354

申请日：2018-01-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Huang-Yi Huang ,  Chun-chieh Wang ,  Yu-Ting Lin ,  Min-Hsiu Hung

IPC: H01L21/762 ,  H01L21/02 ,  H01L23/532 ,  H01L21/768 ,  H01L21/8238 ,  H01L21/285 ,  H01L21/8234

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process.

公开(公告)号：US12300539B2

公开(公告)日：2025-05-13

申请号：US18361770

申请日：2023-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Yu-Ming Huang ,  Ethan Tseng ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/285 ,  H10D30/01 ,  H10D30/62 ,  H10D62/13 ,  H10D62/40 ,  H10D62/832 ,  H10D64/62

Abstract: A semiconductor device includes a substrate, two semiconductor fins protruding from the substrate, an epitaxial feature over the two semiconductor fins and connected to the two semiconductor fins, a silicide layer over the epitaxial feature, a barrier layer over the silicide layer, and a metal layer over the barrier layer. The barrier layer includes a metal nitride. Along a boundary between the barrier layer and the metal layer, an atomic ratio of oxygen to metal nitride is about 0.15 to about 1.0.

公开(公告)号：US20220301858A1

公开(公告)日：2022-09-22

申请号：US17205847

申请日：2021-03-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Min-Hsiu Hung ,  Chun-I Tsai ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/02 ,  H01L21/768

Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.