公开(公告)号：US12002712B2

公开(公告)日：2024-06-04

申请号：US17809922

申请日：2022-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hsien Huang ,  I-Li Chen ,  Pin-Wen Chen ,  Yuan-Chen Hsu ,  Wei-Jung Lin ,  Chih-Wei Chang ,  Ming-Hsing Tsai

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76861 ,  H01L21/76805 ,  H01L21/76826 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53257 ,  H01L23/53266

Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.

公开(公告)号：US20230369103A1

公开(公告)日：2023-11-16

申请号：US18359414

申请日：2023-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Ju Chen ,  Chun-Hsien Huang ,  Su-Hao Liu ,  Liang-Yin Chen ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L21/76825 ,  H01L21/76822 ,  H01L23/5283 ,  H01L21/76883 ,  H01L23/53295 ,  H01L21/76816 ,  H01L23/5226 ,  H01L23/53242 ,  H01L21/76886

Abstract: A connecting structure includes a first dielectric layer disposed over a substrate and a conductive feature, a doped dielectric layer disposed over the first dielectric layer, a first metal portion disposed in the first dielectric layer and in contact with the conductive feature, and a doped metal portion disposed over the first metal portion. The first metal portion and the doped metal portion include a same noble metal material. The doped dielectric layer and the doped metal portion include same dopants.

公开(公告)号：US20230223302A1

公开(公告)日：2023-07-13

申请号：US17663302

申请日：2022-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pin-Wen Chen ,  Chang-Ting Chung ,  Yi-Hsiang Chao ,  Yu-Ting Wen ,  Kai-Chieh Yang ,  Yu-Chen Ko ,  Peng-Hao Hsu ,  Ya-Yi Cheng ,  Min-Hsiu Hung ,  Chun-Hsien Huang ,  Wei-Jung Lin ,  Chih-Wei Chang ,  Ming-Hsing Tsai

IPC: H01L21/768 ,  H01L23/535 ,  H01L21/02

CPC classification number: H01L21/76895 ,  H01L23/535 ,  H01L21/02063 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76889

Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.

公开(公告)号：US20230155004A1

公开(公告)日：2023-05-18

申请号：US17651721

申请日：2022-02-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Wen Wu ,  Chun-Hsien Huang ,  Wei-Jung Lin ,  Chih-Wei Chang

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06 ,  H01L29/786 ,  H01L21/8234

CPC classification number: H01L29/66795 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/0665 ,  H01L29/7851 ,  H01L29/41791 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696

Abstract: A method includes depositing an inter-layer dielectric (ILD) over a source/drain region; forming a contact opening through the ILD, wherein the contact opening exposes the source/drain region; forming a metal-semiconductor alloy region on the source/drain region; depositing a first layer of a conductive material on the metal-semiconductor alloy region; depositing an isolation material along sidewalls of the contact opening and over the first layer of the conductive material; etching the isolation material to expose the first layer of the conductive material, wherein the isolation material extends along sidewalls of the contact opening after etching the isolation material; and depositing a second layer of the conductive material on the first layer of the conductive material.

公开(公告)号：US20170287779A1

公开(公告)日：2017-10-05

申请号：US15628267

申请日：2017-06-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chun-Hsien Huang ,  Hong-Mao Lee ,  Hsien-Lung Yang ,  Yu-Kai Chen ,  Wei-Jung Lin

IPC: H01L21/768 ,  H01L21/8238

Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.

公开(公告)号：US09773779B2

公开(公告)日：2017-09-26

申请号：US14856813

申请日：2015-09-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： I-Tseng Chen ,  Hon-Lin Huang ,  Chun-Hsien Huang ,  Yu-Hung Lin

IPC: H01L21/20 ,  H01L27/06 ,  H01L21/8234 ,  H01L21/02 ,  H01L49/02

CPC classification number: H01L27/0629 ,  H01L21/02271 ,  H01L21/823437 ,  H01L28/20

Abstract: A semiconductor device structure including a resistor layer is provided. The semiconductor device structure includes a gate structure formed over the first region of the substrate and an inter-layer dielectric (ILD) layer formed adjacent to the gate structure. The semiconductor device structure further includes a resistor layer is formed over the ILD layer over the second region of the substrate, and the major structure of the resistor layer is amorphous.

公开(公告)号：US20240387265A1

公开(公告)日：2024-11-21

申请号：US18786535

申请日：2024-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pin-Wen Chen ,  Chang-Ting Chung ,  Yi-Hsiang Chao ,  Yu-Ting Wen ,  Kai-Chieh Yang ,  Yu-Chen Ko ,  Peng-Hao Hsu ,  Ya-Yi Cheng ,  Min-Hsiu Hung ,  Chun-Hsien Huang ,  Wei-Jung Lin ,  Chih-Wei Chang ,  Ming-Hsing Tsai

IPC: H01L21/768 ,  H01L21/02 ,  H01L23/535

Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.

公开(公告)号：US20240321751A1

公开(公告)日：2024-09-26

申请号：US18654111

申请日：2024-05-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Ju Chen ,  Chun-Hsien Huang ,  Su-Hao Liu ,  Liang-Yin Chen ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L23/532 ,  H01L21/3215 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53242 ,  H01L21/3215 ,  H01L21/76883 ,  H01L23/5226

Abstract: A semiconductor device includes a first dielectric layer disposed over a substrate and a conductive feature, a doped dielectric layer disposed over the first dielectric layer, a first metal portion disposed in the first dielectric layer and in contact with the conductive feature, and a doped metal portion disposed over the first metal portion. The first metal portion and the doped metal portion include a same noble metal material. The doped dielectric layer and the doped metal portion include same dopants. The dopants are bonded to the noble metal material.

公开(公告)号：US20230260836A1

公开(公告)日：2023-08-17

申请号：US17663315

申请日：2022-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei Shan Chang ,  Yi-Hsiang Chao ,  Chun-Hsien Huang ,  Peng-Hao Hsu ,  Kevin Lee ,  Shu-Lan Chang ,  Ya-Yi Cheng ,  Ching-Yi Chen ,  Wei-Jung Lin ,  Chih-Wei Chang ,  Ming-Hsing Tsai

IPC: H01L21/768 ,  H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L21/76852 ,  H01L29/78618 ,  H01L29/0665 ,  H01L29/78696 ,  H01L29/66742 ,  H01L21/823418 ,  H01L21/76876

Abstract: A method includes forming a dielectric layer over a source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the source/drain region. A conductive liner is formed on sidewalls and a bottom of the opening. A surface modification process is performed on an exposed surface of the conductive liner. The surface modification process forms a surface coating layer over the conductive liner. The surface coating layer is removed to expose the conductive liner. The conductive liner is removed from the sidewalls of the opening. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with a remaining portion of the conductive liner and the dielectric layer.

公开(公告)号：US20220352020A1

公开(公告)日：2022-11-03

申请号：US17809922

申请日：2022-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hsien Huang ,  I-Li Chen ,  Pin-Wen Chen ,  Yuan-Chen Hsu ,  Wei-Jung Lin ,  Chih-Wei Chang ,  Ming-Hsing Tsai

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening