公开(公告)号：US20150044848A1

公开(公告)日：2015-02-12

申请号：US14504938

申请日：2014-10-02

Applicant: Texas Instruments Incorporated

Inventor： Thomas Dyer BONIFIELD ,  Byron WILLIAMS ,  Shrinivasan JAGANATHAN

IPC: H01L49/02 ,  H01L21/768 ,  H01L29/06

CPC classification number: H01L28/60 ,  H01G4/10 ,  H01G4/14 ,  H01G4/206 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/5222 ,  H01L23/5223 ,  H01L24/05 ,  H01L24/06 ,  H01L27/0288 ,  H01L28/40 ,  H01L29/0642 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/0603 ,  H01L2224/48463 ,  H01L2924/13091 ,  H01L2924/00

Abstract: An integrated circuit includes isolation capacitors which include a silicon dioxide dielectric layer and a polymer dielectric layer over the layer of silicon dioxide. The silicon dioxide dielectric layer and the polymer dielectric layer extend across the integrated circuit. Top plates of the isolation capacitors have bond pads for wire bonds or bump bonds. Bottom plates of the isolation capacitors are connected to components of the integrated circuit. Other bond pads are connected to components in the integrated circuit through vias through the silicon dioxide dielectric layer and the polymer dielectric layer.

Abstract translation: 集成电路包括隔离电容器，其包括在二氧化硅层上的二氧化硅介电层和聚合物电介质层。 二氧化硅介电层和聚合物电介质层跨过集成电路延伸。 隔离电容器的顶板具有用于引线键合或凸起键的接合焊盘。 隔离电容器的底板连接到集成电路的组件。 其他接合焊盘通过通孔通过二氧化硅介电层和聚合物电介质层连接到集成电路中的组件。

公开(公告)号：US20200381342A1

公开(公告)日：2020-12-03

申请号：US16886130

申请日：2020-05-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： YongSeok PARK ,  Makarand Ramkrishna KULKARNI ,  Ricky Alan JACKSON ,  Byron Lovell WILLIAMS ,  Thomas Dyer BONIFIELD

IPC: H01L23/495 ,  H01L23/528 ,  H01L23/31 ,  H01L43/06 ,  G01R15/20 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

Abstract: In examples, a semiconductor package comprises a first conductive terminal; a second conductive terminal; a conductive pathway coupling the first and second conductive terminals, the conductive pathway configured to generate a magnetic field; a semiconductor die including a circuit configured to detect the magnetic field; and first and second polyimide layers positioned between the conductive pathway and the semiconductor die.

公开(公告)号：US20150181706A1

公开(公告)日：2015-06-25

申请号：US14643230

申请日：2015-03-10

Applicant: Texas Instruments Incorporated

Inventor： Thomas Dyer BONIFIELD ,  Byron WILLIAMS ,  Shrinivasan JAGANATHAN ,  David LARKIN ,  Dhaval Atul SARAIYA

IPC: H05K1/03 ,  H05K1/16 ,  H05K1/11 ,  H05K1/09

CPC classification number: H01L23/5223 ,  H01L23/49811 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L23/538 ,  H01L23/62 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48463 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/14335 ,  H05K1/0256 ,  H05K1/0257 ,  H05K1/0262 ,  H05K1/0306 ,  H05K1/0346 ,  H05K1/09 ,  H05K1/112 ,  H05K1/162 ,  H05K1/165 ,  H05K3/0088 ,  H05K3/4688 ,  H05K2201/0154 ,  H05K2201/0175 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0746 ,  H05K2201/09409 ,  H05K2201/0949 ,  H05K2201/09672 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.

公开(公告)号：US20150041190A1

公开(公告)日：2015-02-12

申请号：US13960406

申请日：2013-08-06

Applicant: Texas Instruments Incorporated

Inventor： Thomas Dyer BONIFIELD ,  Byron WILLIAMS ,  Shrinivasan JAGANATHAN ,  David LARKIN ,  Dhaval Atul SARAIYA

IPC: H05K1/03 ,  H05K1/16 ,  H05K3/00 ,  H05K1/09

CPC classification number: H01L23/5223 ,  H01L23/49811 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L23/538 ,  H01L23/62 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48463 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/14335 ,  H05K1/0256 ,  H05K1/0257 ,  H05K1/0262 ,  H05K1/0306 ,  H05K1/0346 ,  H05K1/09 ,  H05K1/112 ,  H05K1/162 ,  H05K1/165 ,  H05K3/0088 ,  H05K3/4688 ,  H05K2201/0154 ,  H05K2201/0175 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0746 ,  H05K2201/09409 ,  H05K2201/0949 ,  H05K2201/09672 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.

Abstract translation: 电子隔离装置形成在单片基板上并且包括多个被动隔离部件。 隔离元件形成三个金属层。 通过无机PMD层将第一金属层与整体式衬底分离。 第二金属层与第一金属层分开一层二氧化硅。 第三金属层与第二金属层相隔至少20微米的聚酰亚胺或PBO。 隔离组件包括用于连接到其他设备的第三金属层上的焊盘。 在第三金属层上形成介电层，露出粘合垫。 隔离器件不含晶体管。

公开(公告)号：US20230138570A1

公开(公告)日：2023-05-04

申请号：US17515295

申请日：2021-10-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Thomas Dyer BONIFIELD ,  Sarvesh Jagdish BANG ,  Chittranjan Mohan GUPTA

IPC: H01L23/495 ,  H01L23/00 ,  H01L25/00 ,  H01L25/18 ,  H01L25/065

Abstract: In examples, a semiconductor package comprises a first driver die adapted to be coupled to a high-side switch of a power supply, the first driver die adapted to drive a gate of the high-side switch. The package also includes a second driver die adapted to be coupled to a low-side switch of the power supply, the second driver die adapted to drive a gate of the low-side switch. The package also includes a controller die positioned between the first and second driver dies and configured to control the first and second driver dies. The package also includes a pair of bond wires configured to provide a differential signal between the controller die and the first driver die, a vertical plane of a bond wire in the pair of bond wires and a vertical plane of a side surface of the first driver die having an angle therebetween ranging from 80 to 95 degrees.

公开(公告)号：US20200168534A1

公开(公告)日：2020-05-28

申请号：US16202663

申请日：2018-11-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Thomas Dyer BONIFIELD ,  Sreeram Subramanyam NASUM ,  Robert H. EKLUND ,  Jeffrey Alan WEST ,  Byron Lovell WILLIAMS ,  Elizabeth Costner STEWART

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00

Abstract: In some examples, a multi-chip module (MCM), comprises a first and a second die-attach pad (DAP); a first die comprising a first set of microelectronic devices; a second die comprising a first capacitor and a second capacitor; and a third die comprising a second set of microelectronic devices, where the first and second dies are positioned on the first DAP, and the third die is positioned on the second DAP. The first set of microelectronic devices couples to the first capacitor via a first inter-die connection and the second set of microelectronic devices couples to the second capacitor via a second inter-die connection.

公开(公告)号：US20160307840A1

公开(公告)日：2016-10-20

申请号：US15193355

申请日：2016-06-27

Applicant: Texas Instruments Incorporated

Inventor： Thomas Dyer BONIFIELD ,  Byron WILLIAMS ,  Shrinivasan JAGANATHAN ,  David LARKIN ,  Dhaval Atul SARAIYA

IPC: H01L23/522 ,  H01L23/538 ,  H01L23/498 ,  H01L23/62 ,  H05K1/16 ,  H01L23/532 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K1/11 ,  H01L23/528 ,  H01L23/00

CPC classification number: H01L23/5223 ,  H01L23/49811 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L23/538 ,  H01L23/62 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48463 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/14335 ,  H05K1/0256 ,  H05K1/0257 ,  H05K1/0262 ,  H05K1/0306 ,  H05K1/0346 ,  H05K1/09 ,  H05K1/112 ,  H05K1/162 ,  H05K1/165 ,  H05K3/0088 ,  H05K3/4688 ,  H05K2201/0154 ,  H05K2201/0175 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0746 ,  H05K2201/09409 ,  H05K2201/0949 ,  H05K2201/09672 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.