公开(公告)号：US09722083B2

公开(公告)日：2017-08-01

申请号：US14056711

申请日：2013-10-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun Hsiung Tsai ,  Sheng-Wen Yu ,  Ziwei Fang

IPC分类号： H01L21/425 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L21/265 ,  H01L29/165

CPC分类号： H01L29/785 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/66803

摘要： An embodiment method of forming a source/drain region for a transistor includes forming a recess in a substrate, epitaxially growing a semiconductor material in the recess, amorphizing the semiconductor material, and doping the semiconductor material to form a source/drain region. In an embodiment, the doping utilizes either phosphorus or boron as the dopant. Also, the amorphizing and the doping may be performed simultaneously. The amorphizing may be performed at least in part by doping with helium.

公开(公告)号：US10720529B2

公开(公告)日：2020-07-21

申请号：US16222259

申请日：2018-12-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun Hsiung Tsai ,  Sheng-Wen Yu ,  Ziwei Fang

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/165 ,  H01L29/08 ,  H01L21/265

摘要： A method includes forming a first channel region and a first gate structure formed over the first channel region. A first source/drain region is formed adjacent the first channel region and the first source/drain region includes a crystalline structure doped with a first dopant. A first silicide is formed over the first source/drain region. The first source/drain region includes a first concentration of the first dopant between 2.0×1021 atoms per centimeter cubed and 4.0×1021 atoms per centimeter cubed at a depth of 8 to 10 nanometers.

公开(公告)号：US20190140089A1

公开(公告)日：2019-05-09

申请号：US16222259

申请日：2018-12-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun Hsiung Tsai ,  Sheng-Wen Yu ,  Ziwei Fang

IPC分类号： H01L29/78 ,  H01L29/165 ,  H01L29/66 ,  H01L21/265 ,  H01L29/08

CPC分类号： H01L29/785 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/66803

摘要： A method includes forming a first channel region and a first gate structure formed over the first channel region. A first source/drain region is formed adjacent the first channel region and the first source/drain region includes a crystalline structure doped with a first dopant. A first silicide is formed over the first source/drain region. The first source/drain region includes a first concentration of the first dopant between 2.0×1021 atoms per centimeter cubed and 4.0×1021 atoms per centimeter cubed at a depth of 8 to 10 nanometers.

公开(公告)号：US20150111359A1

公开(公告)日：2015-04-23

申请号：US14056711

申请日：2013-10-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun Hsiung Tsai ,  Sheng-Wen Yu ,  Ziwei Fang

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L21/425 ,  H01L29/66 ,  H01L21/02

CPC分类号： H01L29/785 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/66803

摘要： An embodiment method of forming a source/drain region for a transistor includes forming a recess in a substrate, epitaxially growing a semiconductor material in the recess, amorphizing the semiconductor material, and doping the semiconductor material to form a source/drain region. In an embodiment, the doping utilizes either phosphorus or boron as the dopant. Also, the amorphizing and the doping may be performed simultaneously. The amorphizing may be performed at least in part by doping with helium.

摘要翻译： 形成晶体管的源极/漏极区域的实施方式包括在衬底中形成凹槽，在凹槽中外延生长半导体材料，使半导体材料非晶化，以及掺杂半导体材料以形成源极/漏极区域。 在一个实施方案中，掺杂利用磷或硼作为掺杂剂。 此外，可以同时进行非晶化和掺杂。 至少部分地通过掺杂氦来进行非晶化。

公开(公告)号：US20140233043A1

公开(公告)日：2014-08-21

申请号：US14263693

申请日：2014-04-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun Hsiung Tsai ,  Sheng-Wen Yu ,  De-Wei Yu

IPC分类号： G01B11/14 ,  G01N21/55

CPC分类号： G01B11/14 ,  G01N21/55 ,  H01L21/324 ,  H01L22/12 ,  H01L22/20

摘要： A system includes a computer-readable medium that stores a plurality of instructions for execution by at least one computer processor. The instructions include receiving a reflectivity measurement on a semiconductor wafer and generating a reflectivity map based on the received reflectivity measurement. The instructions determine a spatial distance for a selected reflectivity change using the generated reflectivity map. Subsequently, the determined spatial distance is compared with a thermal diffusion length of a first anneal process technique. In embodiments, the system further includes a light source and a reflectivity measurement tool.

摘要翻译： 一种系统包括存储由至少一个计算机处理器执行的多个指令的计算机可读介质。 说明书包括在半导体晶片上接收反射率测量值，并根据所接收的反射率测量值产生反射率图谱。 该指令使用生成的反射率图确定所选反射率变化的空间距离。 随后，将确定的空间距离与第一退火处理技术的热扩散长度进行比较。 在实施例中，系统还包括光源和反射率测量工具。

公开(公告)号：US20160155671A1

公开(公告)日：2016-06-02

申请号：US15016079

申请日：2016-02-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Lien Huang ,  Tung Ying Lee ,  Pei-Yi Lin ,  Chun-Hsiang Fan ,  Sheng-Wen Yu ,  Neng-Kuo Chen ,  Ming-Huan Tsai

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L29/40 ,  H01L21/324 ,  H01L21/762 ,  H01L21/3105

CPC分类号： H01L21/823481 ,  H01L21/31055 ,  H01L21/324 ,  H01L21/76224 ,  H01L21/76229 ,  H01L27/088 ,  H01L29/401

摘要： A method of forming a semiconductor device is provided. The method includes forming a recess in a substrate and forming a first dielectric layer in the recess. A portion of the first dielectric layer is removed. A second dielectric layer is formed over the first dielectric layer. A gate structure is formed over the second dielectric layer.

摘要翻译： 提供一种形成半导体器件的方法。 该方法包括在衬底中形成凹部并在凹部中形成第一介电层。 去除第一电介质层的一部分。 在第一电介质层上形成第二电介质层。 在第二电介质层上形成栅极结构。

公开(公告)号：US20140252432A1

公开(公告)日：2014-09-11

申请号：US13894605

申请日：2013-05-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Lien Huang ,  Tung Ying Lee ,  Pei-Yi Lin ,  Chun-Hsiang Fan ,  Sheng-Wen Yu ,  Neng-Kuo Chen ,  Ming-Huan Tsai

IPC分类号： H01L29/06 ,  H01L21/762

CPC分类号： H01L21/823481 ,  H01L21/31055 ,  H01L21/324 ,  H01L21/76224 ,  H01L21/76229 ,  H01L27/088 ,  H01L29/401

摘要： A semiconductor device includes a substrate and a gate structure formed over the substrate. The semiconductor device further includes an insulator feature formed in the substrate. The insulator feature includes an insulating layer and a capping layer over the insulating layer.

摘要翻译： 半导体器件包括衬底和形成在衬底上的栅极结构。 半导体器件还包括形成在衬底中的绝缘体特征。 绝缘体特征包括在绝缘层上的绝缘层和覆盖层。

公开(公告)号：US09953878B2

公开(公告)日：2018-04-24

申请号：US15016079

申请日：2016-02-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Lien Huang ,  Tung Ying Lee ,  Pei-Yi Lin ,  Chun-Hsiang Fan ,  Sheng-Wen Yu ,  Neng-Kuo Chen ,  Ming-Huan Tsai

IPC分类号： H01L21/76 ,  H01L21/8234 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/324 ,  H01L27/088 ,  H01L29/40

CPC分类号： H01L21/823481 ,  H01L21/31055 ,  H01L21/324 ,  H01L21/76224 ,  H01L21/76229 ,  H01L27/088 ,  H01L29/401

摘要： A method of forming a semiconductor device is provided. The method includes forming a recess in a substrate and forming a first dielectric layer in the recess. A portion of the first dielectric layer is removed. A second dielectric layer is formed over the first dielectric layer. A gate structure is formed over the second dielectric layer.

公开(公告)号：US20150292868A1

公开(公告)日：2015-10-15

申请号：US14536298

申请日：2014-11-07

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chun Hsiung Tsai ,  Sheng-Wen Yu ,  De-Wei Yu

IPC分类号： G01B11/14 ,  H01L21/66 ,  H01L21/02 ,  G01N21/55

CPC分类号： G01B11/14 ,  G01N21/55 ,  G01N2021/551 ,  G01N2021/555 ,  G01N2021/557 ,  G01N2021/8416 ,  G01N2201/061 ,  H01L21/02636 ,  H01L21/324 ,  H01L22/12 ,  H01L22/20

摘要： Methods and systems that include receiving a plurality of reflectivity measurements on a semiconductor wafer. A reflectivity map is generated based on the received plurality of reflectivity measurements. The generated reflectivity map is used to determine a process parameter of an epitaxial growth process using the reflectivity map. In an embodiment, the process parameter is a power setting (heating) of a lamp of a CVD epitaxy tool.

摘要翻译： 包括在半导体晶片上接收多个反射率测量的方法和系统。 基于接收的多个反射率测量产生反射率图。 所产生的反射率图用于使用反射率图来确定外延生长过程的工艺参数。 在一个实施例中，工艺参数是CVD外延工具的灯的功率设定（加热）。

公开(公告)号：US08883522B2

公开(公告)日：2014-11-11

申请号：US14263693

申请日：2014-04-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun Hsiung Tsai ,  Sheng-Wen Yu ,  De-Wei Yu

IPC分类号： G01N21/55 ,  G01B11/14 ,  H01L21/00

CPC分类号： G01B11/14 ,  G01N21/55 ,  H01L21/324 ,  H01L22/12 ,  H01L22/20

摘要： A system includes a computer-readable medium that stores a plurality of instructions for execution by at least one computer processor. The instructions include receiving a reflectivity measurement on a semiconductor wafer and generating a reflectivity map based on the received reflectivity measurement. The instructions determine a spatial distance for a selected reflectivity change using the generated reflectivity map. Subsequently, the determined spatial distance is compared with a thermal diffusion length of a first anneal process technique. In embodiments, the system further includes a light source and a reflectivity measurement tool.

摘要翻译： 一种系统包括存储由至少一个计算机处理器执行的多个指令的计算机可读介质。 说明书包括在半导体晶片上接收反射率测量值，并根据所接收的反射率测量值产生反射率图谱。 该指令使用生成的反射率图确定所选反射率变化的空间距离。 随后，将确定的空间距离与第一退火处理技术的热扩散长度进行比较。 在实施例中，系统还包括光源和反射率测量工具。