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公开(公告)号：US09379676B2
公开(公告)日：2016-06-28
申请号：US14166370
申请日：2014-01-28
Applicant: Silicon Laboratories Inc.
Inventor： Michael S. Johnson , Russell Croman
CPC classification number: H03F1/56 , H03F3/45941 , H03F3/45977 , H03F3/45995 , H03F2203/45048 , H03F2203/45078 , H03F2203/45082 , H03F2203/45171 , H03F2203/45522 , H03F2203/45538 , H03F2203/45576 , H03F2203/45591 , H03F2203/45616
Abstract: Circuitry and methods are disclosed that may employ common mode calibration circuitry configured to at least partially calibrate out impedance differences or mismatches between the differential signal paths of differential signal circuitry. The common mode calibration circuitry may be integrated as an internal part of integrated differential signal circuitry that includes a differential amplifier to reject common mode noise, and may be used to reduce or substantially eliminate any external and/or internal difference in signal path resistance that exists between the differential signal paths of the integrated differential signal circuitry. A common mode calibration signal may be internally or externally applied to the signal inputs of differential signal circuitry, and used to determine a setting for the common mode calibration circuitry that at least partially calibrates out impedance differences or mismatches between the differential signal paths of differential signal circuitry.
Abstract translation: 公开了可以采用共模校准电路的电路和方法，其配置为至少部分地校准差分信号电路的差分信号路径之间的阻抗差或失配。 共模校准电路可以集成为集成差分信号电路的内部部分，其包括用于抑制共模噪声的差分放大器，并且可以用于减少或基本消除存在的信号路径电阻中的任何外部和/或内部差异 在集成差分信号电路的差分信号路径之间。 共模校准信号可以在内部或外部施加到差分信号电路的信号输入端，并且用于确定共模校准电路的设置，其至少部分地校准差分信号的差分信号路径之间的阻抗差或失配 电路。
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公开(公告)号：US12009793B2
公开(公告)日：2024-06-11
申请号：US18175593
申请日：2023-02-28
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Sherry Wu , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F3/245 , H03F1/0233 , H04B1/04 , H04L27/12 , H03F2200/105 , H03F2200/451 , H04B2001/0408
Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
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公开(公告)号：US20230208368A1
公开(公告)日：2023-06-29
申请号：US18175593
申请日：2023-02-28
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Sherry Wu , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F3/245 , H03F1/0233 , H04B1/04 , H04L27/12 , H04B2001/0408 , H03F2200/105 , H03F2200/451
Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
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公开(公告)号：US11646705B2
公开(公告)日：2023-05-09
申请号：US17363049
申请日：2021-06-30
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Sherry Wu , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F3/245 , H03F1/0233 , H04B1/04 , H04L27/12 , H03F2200/105 , H03F2200/451 , H04B2001/0408
Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
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公开(公告)号：US20210175855A1
公开(公告)日：2021-06-10
申请号：US16705868
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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Patent Agency Ranking
6.发明公开公开(公告)号：US20240267005A1
公开(公告)日：2024-08-08
申请号：US18639872
申请日：2024-04-18
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to amplify the delayed oscillating signal for transmission sufficient to produce interference, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US12028024B2
公开(公告)日：2024-07-02
申请号：US16705868
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US20230006621A1
公开(公告)日：2023-01-05
申请号：US17363049
申请日：2021-06-30
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Sherry Wu , Michael S. Johnson , Vitor Pereira
Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
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公开(公告)号：US10256854B1
公开(公告)日：2019-04-09
申请号：US15875278
申请日：2018-01-19
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Sriharsha Vasadi , Zhongda Wang , Mustafa H. Koroglu , John M. Khoury , Aslamali A. Rafi , Michael S. Johnson , Francesco Barale , Sherry Xiaohong Wu
Abstract: In an embodiment, an apparatus includes: a transmit circuit to upconvert a baseband signal to a first differential radio frequency (RF) signal, the transmit circuit to convert the first differential RF signal to a first single-ended RF signal; a duty cycle correction circuit coupled to the transmit circuit to receive the first single-ended RF signal and compensate for a duty cycle variation in the first single-ended RF signal to output a duty cycle-corrected RF signal; a conversion circuit to convert the duty cycle-corrected RF signal to a second differential RF signal; and an interface circuit to transfer the second differential RF signal from a first ground domain to a second ground domain.
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公开(公告)号：US20150214911A1
公开(公告)日：2015-07-30
申请号：US14166370
申请日：2014-01-28
Applicant: Silicon Laboratories Inc.
Inventor： Michael S. Johnson , Russell Croman
CPC classification number: H03F1/56 , H03F3/45941 , H03F3/45977 , H03F3/45995 , H03F2203/45048 , H03F2203/45078 , H03F2203/45082 , H03F2203/45171 , H03F2203/45522 , H03F2203/45538 , H03F2203/45576 , H03F2203/45591 , H03F2203/45616
Abstract: Circuitry and methods are disclosed that may employ common mode calibration circuitry configured to at least partially calibrate out impedance differences or mismatches between the differential signal paths of differential signal circuitry. The common mode calibration circuitry may be integrated as an internal part of integrated differential signal circuitry that includes a differential amplifier to reject common mode noise, and may be used to reduce or substantially eliminate any external and/or internal difference in signal path resistance that exists between the differential signal paths of the integrated differential signal circuitry. A common mode calibration signal may be internally or externally applied to the signal inputs of differential signal circuitry, and used to determine a setting for the common mode calibration circuitry that at least partially calibrates out impedance differences or mismatches between the differential signal paths of differential signal circuitry.
Abstract translation: 公开了可以采用共模校准电路的电路和方法，其配置为至少部分地校准差分信号电路的差分信号路径之间的阻抗差或失配。 共模校准电路可以集成为集成差分信号电路的内部部分，其包括用于抑制共模噪声的差分放大器，并且可以用于减少或基本消除存在的信号路径电阻中的任何外部和/或内部差异 在集成差分信号电路的差分信号路径之间。 共模校准信号可以在内部或外部施加到差分信号电路的信号输入端，并且用于确定共模校准电路的设置，其至少部分地校准差分信号的差分信号路径之间的阻抗差或失配 电路。
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