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公开(公告)号:US11863192B2
公开(公告)日:2024-01-02
申请号:US17855537
申请日:2022-06-30
Applicant: Silicon Laboratories Inc.
Inventor: John M. Khoury
CPC classification number: H03L7/0991 , G06F1/022 , H03B5/1206 , H03B5/1212 , H03B5/1218 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03L7/085 , H03L7/099 , H03L7/0992 , H03L7/148 , H03L7/189 , H03L7/1974
Abstract: An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.
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公开(公告)号:US11770678B2
公开(公告)日:2023-09-26
申请号:US17486044
申请日:2021-09-27
Applicant: Silicon Laboratories Inc.
Inventor: John M. Khoury
Abstract: A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as a tag, transmitting a first frequency in a first frequency group. The receiver, also referred to as the locator, receives the first frequency and measures the phase at a first point in time. At a later time, the transmitter switches to a second frequency, which is close in frequency to the first frequency so as to also be part of the first frequency group. The receiver also switches to the second frequency. The receiver then measures the phase of the second frequency at a second point in time. The transmitter and receiver then repeat this sequence for a second frequency group. The four phase measurements are used to determine the distance from the transmitter to the receiver. In this way, improved accuracy may be achieved by having a large separation between the first frequency group and the second frequency group.
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公开(公告)号:US20230025845A1
公开(公告)日:2023-01-26
申请号:US17486044
申请日:2021-09-27
Applicant: Silicon Laboratories Inc.
Inventor: John M. Khoury
Abstract: A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as a tag, transmitting a first frequency in a first frequency group. The receiver, also referred to as the locator, receives the first frequency and measures the phase at a first point in time. At a later time, the transmitter switches to a second frequency, which is close in frequency to the first frequency so as to also be part of the first frequency group. The receiver also switches to the second frequency. The receiver then measures the phase of the second frequency at a second point in time. The transmitter and receiver then repeat this sequence for a second frequency group. The four phase measurements are used to determine the distance from the transmitter to the receiver. In this way, improved accuracy may be achieved by having a large separation between the first frequency group and the second frequency group.
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公开(公告)号:US10823693B2
公开(公告)日:2020-11-03
申请号:US15861953
申请日:2018-01-04
Applicant: Silicon Laboratories Inc.
Inventor: Euisoo Yoo , Thomas Edward Voor , John M. Khoury
Abstract: In an embodiment, an integrated circuit includes: a switched capacitor coupled between a supply voltage node and a divider node, where a thermistor external to the integrated circuit is to couple to the divider node; an analog-to-digital converter (ADC) coupled to the divider node to receive a voltage at the divider node and generate a digital value based thereon; and a controller coupled to the ADC to determine a temperature associated with the thermistor based at least in part on the digital value.
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公开(公告)号:US20190204253A1
公开(公告)日:2019-07-04
申请号:US15861953
申请日:2018-01-04
Applicant: Silicon Laboratories Inc.
Inventor: Euisoo Yoo , Thomas Edward Voor , John M. Khoury
Abstract: In an embodiment, an integrated circuit includes: a switched capacitor coupled between a supply voltage node and a divider node, where a thermistor external to the integrated circuit is to couple to the divider node; an analog-to-digital converter (ADC) coupled to the divider node to receive a voltage at the divider node and generate a digital value based thereon; and a controller coupled to the ADC to determine a temperature associated with the thermistor based at least in part on the digital value.
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公开(公告)号:US10256854B1
公开(公告)日:2019-04-09
申请号:US15875278
申请日:2018-01-19
Applicant: Silicon Laboratories Inc.
Inventor: Rangakrishnan Srinivasan , Sriharsha Vasadi , Zhongda Wang , Mustafa H. Koroglu , John M. Khoury , Aslamali A. Rafi , Michael S. Johnson , Francesco Barale , Sherry Xiaohong Wu
Abstract: In an embodiment, an apparatus includes: a transmit circuit to upconvert a baseband signal to a first differential radio frequency (RF) signal, the transmit circuit to convert the first differential RF signal to a first single-ended RF signal; a duty cycle correction circuit coupled to the transmit circuit to receive the first single-ended RF signal and compensate for a duty cycle variation in the first single-ended RF signal to output a duty cycle-corrected RF signal; a conversion circuit to convert the duty cycle-corrected RF signal to a second differential RF signal; and an interface circuit to transfer the second differential RF signal from a first ground domain to a second ground domain.
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公开(公告)号:US10181868B2
公开(公告)日:2019-01-15
申请号:US15609412
申请日:2017-05-31
Applicant: Silicon Laboratories Inc.
Inventor: Navin Harwalkar , Arup Mukherji , John M. Khoury
Abstract: An apparatus includes a radio-frequency (RF) receiver. The RF receiver includes a single-balanced passive mixer driven by the output of a low noise amplifier (LNA) and a passive filter driven by an output of the single-balanced passive mixer. The RF receiver further includes a programmable gain amplifier (PGA) having an input resistance that generates noise, where the PGA is driven by an output of the passive filter, and the noise generated by the input resistance of the PGA is suppressed.
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公开(公告)号:US20180138989A1
公开(公告)日:2018-05-17
申请号:US15352775
申请日:2016-11-16
Applicant: Silicon Laboratories Inc.
Inventor: John M. Khoury
CPC classification number: H04B14/026 , H02M1/44 , H02M3/04 , H02M3/158 , H04B1/123
Abstract: In one aspect, an apparatus includes: a pulse frequency modulation (PFM) voltage converter to receive a first voltage and provide a second voltage to a load; and a pulse generator. The PFM voltage converter may include an inductor to store energy based on the first voltage and a switch controllable to switchably couple the first voltage to the inductor. The pulse generator may be configured to generate at least one pulse pair to control the switch, where this pulse pair is formed of a first pulse and a second pulse substantially identical to the first pulse, where the second pulse is separated from the first pulse by a pulse separation interval, when the second voltage is less than a first threshold voltage.
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公开(公告)号:US09819524B2
公开(公告)日:2017-11-14
申请号:US14549910
申请日:2014-11-21
Applicant: Silicon Laboratories Inc.
Inventor: John M. Khoury , Navin Harwalkar
CPC classification number: H04L27/06 , G01R19/2506 , G01R23/165 , H04B1/0021 , H04B2001/0416
Abstract: In one aspect, an apparatus includes: a mixer to receive a radio frequency (RF) signal and downconvert the RF signal into a second frequency signal; an amplifier coupled to the mixer to amplify the second frequency signal; an image rejection (IR) circuit coupled to the programmable gain amplifier (PGA) to orthogonally correct a gain and a phase of the amplified second frequency signal to output a corrected amplified second frequency signal; and a complex filter to filter the corrected amplified second frequency signal.
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公开(公告)号:US20240187005A1
公开(公告)日:2024-06-06
申请号:US18076058
申请日:2022-12-06
Applicant: Silicon Laboratories Inc.
Inventor: John M. Khoury , Michael Wu
CPC classification number: H03L7/0991 , H03B5/32
Abstract: A fractional-N phase-locked loop (PLL) that maintains phase coherence for an output signal with a plurality of possible output frequencies. The fractional-N PLL includes an oscillator, a phase detector to receive a reference clock signal and a feedback signal, and a multi-modulus divider coupled in a feedback path between the oscillator and the phase detector. A multi-modulus pattern generator supplies a drive pattern to the multi-modulus divider to achieve a desired change in frequency of the output signal. The multi-modulus pattern generator initiates the drive pattern at a boundary time to cause the output signal to have a substantially repeatable phase when restarting switching from any one of the output frequencies to any other of the output frequencies.
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