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公开(公告)号：US11973481B2
公开(公告)日：2024-04-30
申请号：US17537075
申请日：2021-11-29
CPC分类号： H03H7/0115 , H03H7/0153 , H04B1/0458 , H04B1/18 , H04B1/40 , H03H2007/013
摘要： A wireless transceiver including a receiver circuit coupled to an RF transceiver node, a tunable notch filter coupled between the RF transceiver node and a reference node, and a controller that programs the tunable notch filter with a selected blocker frequency and that selectively enables the tunable notch filter to attenuate at least one blocker signal. The tunable notch filter may include a variable capacitor and an inductor coupled in series between the RF transceiver node and ground. The inductor of the tunable notch filter may include a bondwire coupled between a semiconductor die and a semiconductor package. The inductance may include a physical inductor mounted on the package or a printed circuit board. The tunable notch filter may be enabled by a switch selectively coupling the filter to either the RF transceiver node or ground. The variable capacitor may be digitally programmed with digital values stored in a memory.
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2.发明授权公开(公告)号：US11552666B1
公开(公告)日：2023-01-10
申请号：US17362148
申请日：2021-06-29
摘要： A wireless transceiver circuit with an impedance matching network within an integrated circuit is disclosed. In some embodiments, the impedance matching network utilizes an inductor, having two portions, disposed on two different metal layers of the integrated circuit. The first end of the first portion of the inductor is in communication with an antenna. The second end of the second portion is in communication with a low noise amplifier for receiving signals and a power amplifier for transmitting RF signals. The second end of the first portion is connected to the first end of the second portion using a via. In another embodiment, the two portions are disposed on the same metal layer, wherein one portion is disposed within the other with a gap separating the two portions. These configurations require less space than using two separate inductors and also have a low coupling coefficient.
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公开(公告)号：US11349448B2
公开(公告)日：2022-05-31
申请号：US16586153
申请日：2019-09-27
发明人： Ruifeng Sun , Francesco Barale , Vinod Jayakumar , Sherry Xiaohong Wu , Mustafa H. Koroglu , Essam S. Atalla
摘要： Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. For disclosed embodiments, a filter circuit is coupled between a first internal node and a connection pad for an integrated circuit. The filter circuit includes a first inductance, a variable capacitance, and a second inductance. The capacitance amount for the variable capacitance is controlled to tune filtering for the filter circuit to a harmonic of a frequency for a transmit output signal. A power amplifier outputs the transmit output signal to the connection pad without passing through the filter circuit. The filter circuit filters the harmonic of the frequency for the transmit output signal, shunting harmonic current to ground. For one embodiment, the filtered harmonic is a third harmonic of the transmit frequency. For one embodiment, the transmit output signal has an output power greater than or equal to 15 dBm.
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公开(公告)号：US20210175855A1
公开(公告)日：2021-06-10
申请号：US16705868
申请日：2019-12-06
发明人： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
摘要： A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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5.发明授权Integrated receiver and integrated circuit having integrated inductors and method therefor 有权具有集成电感器的集成接收器和集成电路及其方法公开(公告)号：US09219512B2
公开(公告)日：2015-12-22
申请号：US14612346
申请日：2015-02-03
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
摘要： In one form, an integrated receiver includes a tracking bandpass filter, a tunable lowpass filter, and a mixer formed on a single integrated circuit chip. The tracking bandpass filter has an input for receiving a radio frequency (RF) input signal, and an output, and comprises a variable capacitor having a capacitance that varies in response to a bandpass frequency control signal, in parallel with an integrated inductor. The integrated inductor comprises a plurality of windings formed in a plurality of metal layers. The tunable lowpass filter has an input coupled to the output of the tracking bandpass filter, and an output and having a tuning input for receiving a cutoff frequency signal. The mixer has a signal input coupled to the output of the tunable lowpass filter, a local oscillator input for receiving a local oscillator signal, and a signal output for providing a converted RF signal.
摘要翻译： 在一种形式中，集成接收器包括跟踪带通滤波器，可调谐低通滤波器和形成在单个集成电路芯片上的混频器。 跟踪带通滤波器具有用于接收射频（RF）输入信号和输出的输入，并且包括与集成电感器并联的具有响应于带通频率控制信号而变化的电容的可变电容器。 集成电感器包括形成在多个金属层中的多个绕组。 可调谐低通滤波器具有耦合到跟踪带通滤波器的输出的输入端和输出端，并具有用于接收截止频率信号的调谐输入端。 混频器具有耦合到可调谐低通滤波器的输出的信号输入，用于接收本地振荡器信号的本地振荡器输入和用于提供经转换的RF信号的信号输出。
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公开(公告)号：US08928820B2
公开(公告)日：2015-01-06
申请号：US13799351
申请日：2013-03-13
IPC分类号： H04N5/50 , H04N5/44 , H04N21/426 , H04N21/438
CPC分类号： H04N21/4263 , H03J1/0008 , H03L7/1974 , H04N5/50 , H04N21/4383
摘要： A method includes receiving a request to tune to a first desired television channel of a cable spectrum provided in a radio frequency (RF) signal received in a multi-tuner circuit configured to receive and process the entire cable spectrum, determining a channel of the channels including the first desired television channel, disabling the channels other than the determined channel, and processing the RF signal in the determined channel.
摘要翻译： 一种方法包括接收调谐到在被配置为接收和处理整个有线频谱的多调谐器电路中接收的射频（RF）信号中提供的电缆频谱的第一期望电视频道的请求，确定频道的频道 包括第一期望的电视频道，禁止除确定的频道以外的频道，以及处理所确定的频道中的RF信号。
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公开(公告)号：US20140267925A1
公开(公告)日：2014-09-18
申请号：US13799384
申请日：2013-03-13
IPC分类号： H04N5/44
CPC分类号： H04N5/4401 , H04N5/455 , H04N5/50 , H04N21/4263 , H04N21/4382
摘要： An apparatus includes a splitter to receive a radio frequency (RF) signal and to provide the RF signal to multiple channels of a tuner. Each channel may include an amplifier to amplify the RF signal, a mixer to downconvert the amplified RF signal to a second frequency signal using a local oscillator (LO) signal, where each of the channels is configured to receive a different LO signal, a filter to filter the downconverted second frequency signal, and a digitizer to digitize the downconverted second frequency signal. A clock generation circuit has multiple interpolative dividers and a frequency synthesizer to generate a reference clock signal. Each of the interpolative dividers is configured to receive the reference clock signal, generate a corresponding LO signal, and provide the corresponding LO signal to the mixer of at least one of the channels.
摘要翻译： 一种装置包括用于接收射频（RF）信号并将RF信号提供给调谐器的多个信道的分离器。 每个通道可以包括用于放大RF信号的放大器，使用本地振荡器（LO）信号将放大的RF信号下变频到第二频率信号的混频器，其中每个信道被配置为接收不同的LO信号，滤波器 对下变频的第二频率信号进行滤波，以及数字转换器，对下变频的第二频率信号进行数字化。 时钟发生电路具有多个内插分频器和频率合成器，以产生参考时钟信号。 每个内插分频器被配置为接收参考时钟信号，产生相应的LO信号，并将相应的LO信号提供给至少一个信道的混频器。
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8.发明公开公开(公告)号：US20240267005A1
公开(公告)日：2024-08-08
申请号：US18639872
申请日：2024-04-18
发明人： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC分类号： H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
摘要： A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to amplify the delayed oscillating signal for transmission sufficient to produce interference, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US12028024B2
公开(公告)日：2024-07-02
申请号：US16705868
申请日：2019-12-06
发明人： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC分类号： H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
摘要： A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US20230318609A1
公开(公告)日：2023-10-05
申请号：US17709642
申请日：2022-03-31
发明人： Rangakrishnan Srinivasan , Zhongda Wang , Francesco Barale , Wenhuan Yu , Mustafa H. Koroglu , Yan Zhou , Terry L. Dickey
CPC分类号： H03L7/1075 , H04B1/40 , H03L7/099
摘要： A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.
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