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    Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation
    2.
    发明授权
    Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation 有权

    公开(公告)号：US09800281B2

    公开(公告)日：2017-10-24

    申请号：US15470989

    申请日：2017-03-28

    Applicant: Silicon Laboratories Inc.

    Inventor： Abdulkerim L. Coban ,  Alessandro Piovaccari ,  Ramin K. Poorfard ,  James T. Kao

    IPC: H04B1/06 ,  H04B1/16 ,  H03G3/30

    CPC classification number: H04B1/16 ,  H03G3/3068

    Abstract: A signal processor for a radio frequency (RF) receiver includes a signal processing path having first and second programmable gain amplifiers and first and second offset correction circuits. The first offset correction circuit receives a first digital offset correction word and corrects a first offset of the first programmable gain amplifier by adding a first value corresponding to the first digital offset correction word to an input of the first programmable gain amplifier. The second offset correction circuit receives a second digital offset correction word and corrects a second offset of the second programmable gain amplifier by adding a first value corresponding to the second digital offset correction word to an input of the second programmable gain amplifier. A controller measures offsets of the first and second programmable gain amplifiers during a calibration, and provides the first and second offset correction words in response to the offsets.

    Rotating harmonic rejection mixer
    3.
    发明授权
    Rotating harmonic rejection mixer 有权
    旋转谐波抑制混频器

    公开(公告)号：US08880018B2

    公开(公告)日：2014-11-04

    申请号：US14010993

    申请日：2013-08-27

    Applicant: Silicon Laboratories Inc.

    Inventor： Aslamali A. Rafi ,  Alessandro Piovaccari

    IPC: H04B1/26 ,  H03D7/14 ,  H03D7/00 ,  H03D7/16

    CPC classification number: H03D7/1466 ,  H03D7/00 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0086

    Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

    Abstract translation: 在一个实施例中，本发明包括一个混频器电路，用于接收和产生来自射频（RF）信号和主时钟信号的混合信号，耦合到混频器电路的输出的开关级，以将混合信号旋转切换到 耦合到开关级的多个增益级，以及组合器，以组合增益级的输出。

    Integrated receivers and integrated circuit having integrated inductors
    4.
    发明授权
    Integrated receivers and integrated circuit having integrated inductors 有权
    具有集成电感器的集成接收器和集成电路

    公开(公告)号：US08706069B2

    公开(公告)日：2014-04-22

    申请号：US13923824

    申请日：2013-06-21

    Applicant: Silicon Laboratories Inc.

    Inventor： Ramin Khoini-Poorfard ,  Alessandro Piovaccari ,  Aslamali A. Rafi ,  Mustafa H. Koroglu ,  David S. Trager ,  Abdulkerim L. Coban

    IPC: H04B1/06

    CPC classification number: H04B1/28 ,  H03H11/04 ,  H04B1/30 ,  H04L27/148 ,  H04N5/455 ,  H04N5/50

    Abstract: A receiver includes an input section, a plurality of RF sections, an output circuit, and a controller. The input section receives and amplifies a radio frequency (RF) input signal to provide an amplified RF signal, and has a gain input. The plurality of RF sections each have an input for receiving the amplified RF signal, and an output for providing an intermediate frequency signal. The output circuit provides an intermediate frequency output signal in response to an output of at least one of the plurality of RF sections. The controller has an output coupled to the gain input of the input section.

    Abstract translation: 接收机包括输入部分，多个RF部分，输出电路和控制器。 输入部分接收和放大射频（RF）输入信号以提供放大的RF信号，并具有增益输入。 多个RF部分各自具有用于接收放大的RF信号的输入端和用于提供中频信号的输出端。 输出电路响应于多个RF部分中的至少一个的输出而提供中频输出信号。 控制器具有耦合到输入部分的增益输入的输出。

    Rotating Harmonic Rejection Mixer
    5.
    发明申请
    Rotating Harmonic Rejection Mixer 有权
    旋转谐波抑制搅拌机

    公开(公告)号：US20140038542A1

    公开(公告)日：2014-02-06

    申请号：US14010993

    申请日：2013-08-27

    Applicant: Silicon Laboratories Inc.

    Inventor： Aslamali A. Rafi ,  Alessandro Piovaccari

    IPC: H03D7/14

    CPC classification number: H03D7/1466 ,  H03D7/00 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0086

    Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

    Abstract translation: 在一个实施例中，本发明包括一个混频器电路，用于接收和产生来自射频（RF）信号和主时钟信号的混合信号，耦合到混频器电路的输出的开关级，以将混合信号旋转切换到 耦合到开关级的多个增益级，以及组合器，以组合增益级的输出。

    Integrated receiver and integrated circuit having integrated inductors and method therefor
    8.
    发明授权
    Integrated receiver and integrated circuit having integrated inductors and method therefor 有权
    具有集成电感器的集成接收器和集成电路及其方法

    公开(公告)号：US09219512B2

    公开(公告)日：2015-12-22

    申请号：US14612346

    申请日：2015-02-03

    Applicant: Silicon Laboratories Inc.

    Inventor： Ramin Khoini-Poorfard ,  Alessandro Piovaccari ,  Aslamali A. Rafi ,  Mustafa H. Koroglu ,  David S. Trager ,  Abdulkerim L. Coban

    IPC: H04B1/06 ,  H04N5/50 ,  H04B1/28 ,  H04B1/30 ,  H03H11/04 ,  H04N5/455 ,  H04L27/148

    CPC classification number: H04B1/28 ,  H03H11/04 ,  H04B1/30 ,  H04L27/148 ,  H04N5/455 ,  H04N5/50

    Abstract: In one form, an integrated receiver includes a tracking bandpass filter, a tunable lowpass filter, and a mixer formed on a single integrated circuit chip. The tracking bandpass filter has an input for receiving a radio frequency (RF) input signal, and an output, and comprises a variable capacitor having a capacitance that varies in response to a bandpass frequency control signal, in parallel with an integrated inductor. The integrated inductor comprises a plurality of windings formed in a plurality of metal layers. The tunable lowpass filter has an input coupled to the output of the tracking bandpass filter, and an output and having a tuning input for receiving a cutoff frequency signal. The mixer has a signal input coupled to the output of the tunable lowpass filter, a local oscillator input for receiving a local oscillator signal, and a signal output for providing a converted RF signal.

    Abstract translation: 在一种形式中，集成接收器包括跟踪带通滤波器，可调谐低通滤波器和形成在单个集成电路芯片上的混频器。 跟踪带通滤波器具有用于接收射频（RF）输入信号和输出的输入，并且包括与集成电感器并联的具有响应于带通频率控制信号而变化的电容的可变电容器。 集成电感器包括形成在多个金属层中的多个绕组。 可调谐低通滤波器具有耦合到跟踪带通滤波器的输出的输入端和输出端，并具有用于接收截止频率信号的调谐输入端。 混频器具有耦合到可调谐低通滤波器的输出的信号输入，用于接收本地振荡器信号的本地振荡器输入和用于提供经转换的RF信号的信号输出。

    Signal Processor Suitable for Low Intermediate Frequency (LIF) or Zero Intermediate Frequency (ZIF) Operation
    10.
    发明申请
    Signal Processor Suitable for Low Intermediate Frequency (LIF) or Zero Intermediate Frequency (ZIF) Operation 有权

    公开(公告)号：US20170201282A1

    公开(公告)日：2017-07-13

    申请号：US15470989

    申请日：2017-03-28

    Applicant: Silicon Laboratories Inc.

    Inventor： Abdulkerim L. Coban ,  Alessandro Piovaccari ,  Ramin K. Poorfard ,  James T. Kao

    IPC: H04B1/16 ,  H03G3/30

    CPC classification number: H04B1/16 ,  H03G3/3068

    Abstract: A signal processor for a radio frequency (RF) receiver includes a signal processing path having first and second programmable gain amplifiers and first and second offset correction circuits. The first offset correction circuit receives a first digital offset correction word and corrects a first offset of the first programmable gain amplifier by adding a first value corresponding to the first digital offset correction word to an input of the first programmable gain amplifier. The second offset correction circuit receives a second digital offset correction word and corrects a second offset of the second programmable gain amplifier by adding a first value corresponding to the second digital offset correction word to an input of the second programmable gain amplifier. A controller measures offsets of the first and second programmable gain amplifiers during a calibration, and provides the first and second offset correction words in response to the offsets.

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