知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

389 records (took 0.03 seconds)

    Frequency converter that suppresses crosstalk that occurs between a local oscillation signal and a received signal, and receiver that uses the frequency converter
    4.
    发明授权
    Frequency converter that suppresses crosstalk that occurs between a local oscillation signal and a received signal, and receiver that uses the frequency converter 有权
    用于抑制本地振荡信号与接收信号之间发生串扰的变频器，以及使用变频器的接收机

    公开(公告)号：US09036390B2

    公开(公告)日：2015-05-19

    申请号：US13806570

    申请日：2011-04-14

    Applicant: Masaki Kitsunezuka

    Inventor： Masaki Kitsunezuka

    IPC: H02M5/45 ,  H02M5/02 ,  H03D7/16

    CPC classification number: H02M5/02 ,  H03D7/163 ,  H03D2200/0084

    Abstract: The present invention is applied to a frequency converter used for a receiver. The frequency converter according to the present invention includes an LO signal generator (11) that generates an LO signal and outputs the LO signal; and a mixer (10) that multiplies a received signal that has been band-limited to a usable bandwidth of said receiver by the LO signal so as to convert the frequency of the received signal and outputs the resultant signal. Said LO signal generator is capable of varying a phase resolution.

    Abstract translation: 本发明应用于用于接收机的变频器。 根据本发明的变频器包括产生LO信号并输出​​LO信号的LO信号发生器（11）; 以及混频器（10），其将已经被限制的接收信号与所述接收机的可用带宽乘以LO信号，以便转换接收信号的频率并输出所得到的信号。 所述LO信号发生器能够改变相位分辨率。

    Receiver with wide dynamic range and low power consumption
    5.
    发明授权
    Receiver with wide dynamic range and low power consumption 有权
    接收机具有宽动态范围和低功耗

    公开(公告)号：US08971835B2

    公开(公告)日：2015-03-03

    申请号：US12984864

    申请日：2011-01-05

    Applicant: Krzysztog Dufrene ,  Elmar Wagner

    Inventor： Krzysztog Dufrene ,  Elmar Wagner

    IPC: H04B1/10 ,  H03D7/14 ,  H03D1/22 ,  H03D7/16

    CPC classification number: H03D7/1441 ,  H03D1/2245 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0084

    Abstract: Some embodiments of the invention relate a circuit having a first and a second electrically connected voltage domains, respectively biased at different supply voltages (e.g., the first voltage domain biased at a low bias voltage and the second voltage domain biased at a second, different supply voltage). The apparatus further comprises a first DC current source coupled to one of the voltage domains (e.g., the first voltage domain having a low DC voltage potential) and a second DC current source coupled to the other voltage domain (e.g., the second voltage domain having a high DC voltage potential). The first and second DC current sources are configured to provide a DC cancellation current having a value that cancels a DC current generated by the potential difference between the first and second voltage domains.

    Abstract translation: 本发明的一些实施例涉及一种具有分别在不同电源电压下偏置的第一和第二电连接电压域的电路（例如，以低偏置电压偏置的第一电压域和以第二不同电源偏置的第二电压域 电压）。 该装置还包括耦合到电压域之一（例如，具有低DC电压电位的第一电压域）的第一DC电流源和耦合到另一个电压域的第二DC电流源（例如，第二电压域具有 高直流电压）。 第一和第二DC电流源被配置为提供具有抵消由第一和第二电压域之间的电位差产生的DC电流的值的DC消除电流。

    Mixer-amplifier for an RF receive chain
    7.
    发明授权
    Mixer-amplifier for an RF receive chain 有权
    用于RF接收链的混频器

    公开(公告)号：US08626105B2

    公开(公告)日：2014-01-07

    申请号：US12561153

    申请日：2009-09-16

    Applicant: Valérie Danelon ,  Patrice Garcia

    Inventor： Valérie Danelon ,  Patrice Garcia

    IPC: H04B1/26 ,  H04B15/00 ,  H04B1/28

    CPC classification number: H03D7/1441 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1483 ,  H03D2200/0084 ,  H03D2200/0088

    Abstract: A mixer-amplifier of an RF signal including at least an amplifier circuit and a mixing circuit controlled at a local oscillator frequency, for amplifying a signal applied on at least one input terminal and converting a first frequency of this signal into a second, lower, frequency, and including a reverse feedback loop switched at the local oscillator frequency.

    Abstract translation: 一种RF信号的混频器放大器，至少包括放大器电路和以本地振荡器频率控制的混合电路，用于放大施加在至少一个输入端上的信号，并将该信号的第一频率转换为第二， 频率，并包括以本地振荡器频率切换的反向反馈环路。

    Monolithic integrated transceiver
    8.
    发明授权
    Monolithic integrated transceiver 有权
    单片集成收发器

    公开(公告)号：US08467739B2

    公开(公告)日：2013-06-18

    申请号：US12208198

    申请日：2008-09-10

    Applicant: Sasidhar Vajha ,  Timothy T. Childs ,  Daniel C. Eller

    Inventor： Sasidhar Vajha ,  Timothy T. Childs ,  Daniel C. Eller

    IPC: H04B1/40

    CPC classification number: H03B5/1852 ,  H03D7/1441 ,  H03D7/1475 ,  H03D2200/0084 ,  H04B1/40

    Abstract: A variable operational mode transceiver device formed with an integrated circuit having a semiconductor material substrate supporting a feedback oscillator having a signal power divider electrically coupled to said feedback oscillator output, and a signal frequency multiplier electrically coupled to said signal power divider. A signal mixer has a pair of inputs of which one is electrically coupled to that remaining one of said pair of outputs of said signal power divider.

    Abstract translation: 一种可变操作模式收发器装置，其形成有具有支撑具有电耦合到所述反馈振荡器输出的信号功率分配器的反馈振荡器的半导体材料基板的集成电路，以及电耦合到所述信号功率分配器的信号倍频器。 信号混合器具有一对输入，其中一个输入电耦合到所述信号功率分配器的所述一对输出中的剩余的一个。

    Method and system for output common mode control for reducing DC offset for an IF mixer that downconverts a received signal to DC without introducing additional offset
    9.
    发明授权
    Method and system for output common mode control for reducing DC offset for an IF mixer that downconverts a received signal to DC without introducing additional offset 有权
    用于减少IF混频器的直流偏移的输出共模控制方法和系统，其将接收信号下变频到直流而不引入附加偏移

    公开(公告)号：US08437724B2

    公开(公告)日：2013-05-07

    申请号：US10977874

    申请日：2004-10-29

    Applicant: Meng-An Pan

    Inventor： Meng-An Pan

    IPC: H04B1/10

    CPC classification number: H03D7/1441 ,  H03D3/008 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0033 ,  H03D2200/0047 ,  H03D2200/0084

    Abstract: A method and system for output common mode control for reducing DC offset for an IF mixer that downconverts a received signal to DC without introducing additional offset is provided. Aspects of the method may comprise averaging signals having an output common mode DC level, which are generated from an output of the mixer. This determined average may then be compared to a reference voltage. The reference voltage may be an output common mode DC level required for baseband processing. The output common mode DC level may be corrected at an input of the mixer for signals that may subsequently be generated from an output of the mixer by utilizing results from the comparison. The corrected common mode DC offset level may be fed back to an input of the mixer.

    Abstract translation: 提供了一种用于输出共模控制的方法和系统，用于减少用于将接收信号下变频到DC而不引入附加偏移的IF混频器的DC偏移。 该方法的方面可以包括平均具有从混频器的输出产生的输出共模DC电平的信号。 然后将该确定的平均值与参考电压进行比较。 参考电压可以是基带处理所需的输出共模DC电平。 输出共模DC电平可以在混频器的输入处被校正，用于随后可以通过利用比较结果从混频器的输出产生信号。 校正的共模DC偏移电平可以被反馈到混频器的输入端。

Patent Agency Ranking