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1.发明授权公开(公告)号：US10944617B2
公开(公告)日：2021-03-09
申请号：US15870748
申请日：2018-01-12
Applicant: Silicon Laboratories Inc.
Inventor： Hendricus de Ruijter , Euisoo Yoo
Abstract: An apparatus includes a radio-frequency (RF) receiver. The RF receiver includes an analog-to-digital converter (ADC) to convert an analog input signal to a digital output signal in response to an ADC clock signal. The RF receiver further includes a frequency generator to selectively provide either a clock signal to be provided as the ADC clock signal or a signal to be used for in-phase-quadrature (IQ) calibration of the RF receiver.
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公开(公告)号：US20240022268A1
公开(公告)日：2024-01-18
申请号：US18474395
申请日：2023-09-26
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
CPC classification number: H04B1/0064 , H03F3/195 , H03H7/38 , H03F2200/451 , H03F2200/294
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
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3.发明申请公开(公告)号：US20190222463A1
公开(公告)日：2019-07-18
申请号：US15870748
申请日：2018-01-12
Applicant: Silicon Laboratories Inc.
Inventor： Hendricus de Ruijter , Euisoo Yoo
CPC classification number: H04L27/364 , H04B1/1018 , H04B1/406 , H04L27/3863
Abstract: An apparatus includes a radio-frequency (RF) receiver. The RF receiver includes an analog-to-digital converter (ADC) to convert an analog input signal to a digital output signal in response to an ADC clock signal. The RF receiver further includes a frequency generator to selectively provide either a clock signal to be provided as the ADC clock signal or a signal to be used for in-phase-quadrature (IQ) calibration of the RF receiver.
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公开(公告)号：US10823693B2
公开(公告)日：2020-11-03
申请号：US15861953
申请日：2018-01-04
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Thomas Edward Voor , John M. Khoury
Abstract: In an embodiment, an integrated circuit includes: a switched capacitor coupled between a supply voltage node and a divider node, where a thermistor external to the integrated circuit is to couple to the divider node; an analog-to-digital converter (ADC) coupled to the divider node to receive a voltage at the divider node and generate a digital value based thereon; and a controller coupled to the ADC to determine a temperature associated with the thermistor based at least in part on the digital value.
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公开(公告)号：US20190204253A1
公开(公告)日：2019-07-04
申请号：US15861953
申请日：2018-01-04
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Thomas Edward Voor , John M. Khoury
Abstract: In an embodiment, an integrated circuit includes: a switched capacitor coupled between a supply voltage node and a divider node, where a thermistor external to the integrated circuit is to couple to the divider node; an analog-to-digital converter (ADC) coupled to the divider node to receive a voltage at the divider node and generate a digital value based thereon; and a controller coupled to the ADC to determine a temperature associated with the thermistor based at least in part on the digital value.
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Patent Agency Ranking
公开(公告)号：US12212349B2
公开(公告)日：2025-01-28
申请号：US18474395
申请日：2023-09-26
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
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公开(公告)号：US11804862B2
公开(公告)日：2023-10-31
申请号：US17490255
申请日：2021-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
CPC classification number: H04B1/0064 , H03F3/195 , H03H7/38 , H03F2200/294 , H03F2200/451
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
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公开(公告)号：US20240106398A1
公开(公告)日：2024-03-28
申请号：US17955171
申请日：2022-09-28
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Sriharsha Vasadi , Mustafa Koroglu , Zhongda Wang , Euisoo Yoo , Eddy Bell
CPC classification number: H03F3/245 , H04B1/0475 , H03F2200/451
Abstract: In one aspect, an apparatus comprises: a driver circuit to receive first and second ramp signals and output first and second drive signals under control of a first bias signal and a second bias signal, the first bias signal having a first edge and a second edge, the second edge having a different edge rate than the first edge, the second bias signal having a third edge and a fourth edge, the third edge having a different edge rate than the fourth edge; and an output circuit coupled to the driver circuit, the output circuit comprising at least one first active device to be driven by the first drive signal and at least one second active device to be driven by the second drive signal, where the output circuit is to amplify and output a radio frequency (RF) signal.
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公开(公告)号：US20230099832A1
公开(公告)日：2023-03-30
申请号：US17490255
申请日：2021-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
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10.发明授权公开(公告)号：US10763781B2
公开(公告)日：2020-09-01
申请号：US16023001
申请日：2018-06-29
Applicant: SILICON LABORATORIES INC.
Inventor： Thomas Edward Voor , Jeffrey A. Tindle , Euisoo Yoo , Wei Shen
Abstract: A system and method of performing temperature compensation based on temperature of a crystal. An integrated circuit includes a clock circuit, a memory, an interface developing a sense voltage indicative of a temperature of the crystal, and a controller. The memory stores compensation values including nominal values based on a nominal third order polynomial that defines a nominal frequency versus temperature relationship of a crystal design representing multiple crystals, and a pair of adjustment values derived from two temperature-frequency error points. The controller determines a temperature value based on the sense voltage, calculates a frequency offset using the temperature value and the compensation values to solve a compensated third order polynomial defining a compensated frequency versus temperature relationship of the crystal, and adjusts a clock signal of the clock circuit using the frequency offset. A Wi-Fi device may be optimized for industrial IoT operating within an extended temperature range.
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