公开(公告)号：US11955987B2

公开(公告)日：2024-04-09

申请号：US17872692

申请日：2022-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehyun Kim ,  Joosung Park

IPC: H03M13/11 ,  G06N3/04 ,  G06N3/082 ,  H03M13/09

CPC classification number: H03M13/1111 ,  G06N3/04 ,  G06N3/082 ,  H03M13/09 ,  H03M13/1128 ,  H03M13/1177

Abstract: An electronic device and an operating method of an electronic device are provided. The operating method includes configuring a self-correction condition for adjusting an information deletion and dropout rate, performing iterative decoding on the received information using decoding factors and a self-correction technique, determining whether decoding of the codeword succeeds or fails, based on a result of the decoding, storing a received signal and the codeword which are successfully decoded, based on a determination result, and optimizing the decoding factors, based on the stored received signal and codeword.

公开(公告)号：US11516056B2

公开(公告)日：2022-11-29

申请号：US17024041

申请日：2020-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eungkuk Nam ,  Joosung Park ,  Taehyun Kim ,  Kitaek Bae

IPC: H04L27/26 ,  H04W72/04 ,  H04W80/08 ,  H04L5/00 ,  H04W28/02 ,  H04W52/36 ,  H04L25/02

Abstract: An operating method and an apparatus are provided in which state information is received from at least one of a higher layer and a plurality of terminals. A respective allocation resource is determined for each of the plurality of terminals, based on the state information. A respective guard band is determined to be allocated for each of the plurality of terminals, based on the respective allocation resource. Respective resource blocks (RBs) are determined for each of the plurality of terminals, based on the respective guard band. Information about the determined respective RBs is transmitted to respective terminals of the plurality of terminals.

公开(公告)号：US09076511B2

公开(公告)日：2015-07-07

申请号：US14087444

申请日：2013-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehyun Kim ,  Youngcho Kim ,  Youngsun Min ,  Sungwhan Seo

IPC: G11C5/14 ,  G11C16/06

CPC classification number: G11C5/147 ,  G11C5/145 ,  G11C16/06 ,  G11C16/30

Abstract: A nonvolatile memory device includes a memory cell array; and a high voltage generator arranged to generate a high voltage to be supplied to the memory cell array. The high voltage generator includes a pump unit block having a plurality of pump units supplied with an external voltage and at least one of the pumps is engaged in pumping the external voltage to a higher, output, voltage, at a steady clock rate. The number of pumps engaged in pumping is increased until a predetermined period has elapsed. The rate at which the number of pumps is increased depends upon the value of the external voltage.

Abstract translation: 非易失性存储器件包括存储单元阵列; 以及高电压发生器，其布置成产生要提供给存储单元阵列的高电压。 高压发生器包括具有供给外部电压的多个泵单元的泵单元块，并且至少一个泵接合以以稳定的时钟速率将外部电压泵送到更高的输出电压。 泵送的泵的数量增加直到经过了预定时间。 泵数量增加的速率取决于外部电压的值。

公开(公告)号：US20140233337A1

公开(公告)日：2014-08-21

申请号：US14087444

申请日：2013-11-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taehyun Kim ,  Youngcho Kim ,  Youngsun Min ,  Sungwhan Seo

IPC: G11C5/14

CPC classification number: G11C5/147 ,  G11C5/145 ,  G11C16/06 ,  G11C16/30

Abstract: A nonvolatile memory device includes a memory cell array; and a high voltage generator arranged to generate a high voltage to be supplied to the memory cell array. The high voltage generator includes a pump unit block having a plurality of pump units supplied with an external voltage and at least one of the pumps is engaged in pumping the external voltage to a higher, output, voltage, at a steady clock rate. The number of pumps engaged in pumping is increased until a predetermined period has elapsed. The rate at which the number of pumps is increased depends upon the value of the external voltage.

Abstract translation: 非易失性存储器件包括存储单元阵列; 以及高电压发生器，其布置成产生要提供给存储单元阵列的高电压。 高压发生器包括具有供给外部电压的多个泵单元的泵单元块，并且至少一个泵接合以以稳定的时钟速率将外部电压泵送到更高的输出电压。 泵送的泵的数量增加直到经过了预定时间。 泵数量增加的速率取决于外部电压的值。

公开(公告)号：US11823961B2

公开(公告)日：2023-11-21

申请号：US17021087

申请日：2020-09-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunhee Jeang ,  Boris Afinogenov ,  Sangwoo Bae ,  Wondon Joo ,  Maksim Riabko ,  Anton Medvedev ,  Aleksandr Shorokhov ,  Anton Sofronov ,  Ingi Kim ,  Taehyun Kim ,  Minhwan Seo ,  Sangmin Lee ,  Seulgi Lee

IPC: H01L21/66 ,  H01L21/67 ,  G01N21/95 ,  G01N21/64

CPC classification number: H01L22/12 ,  G01N21/648 ,  G01N21/9505 ,  H01L21/67288 ,  G01N2201/06113

Abstract: A substrate inspection apparatus includes a light source unit, a pulsed beam matching unit, a substrate support unit, an incidence angle adjusting unit, and a detecting unit. The light source unit emits a first laser beam having a first wavelength and a second laser beam having a second wavelength. The pulsed beam matching unit matches the first laser beam and the second laser beam to superimpose a pulse of the first laser beam on a pulse of the second laser beam in time and space. The substrate support unit supports a substrate to be inspected. The incidence angle adjusting unit adjusts angles of incidence of the matched first laser beam and second laser beams to irradiate the first laser beam and the second laser beam on the substrate, and mixes the first laser beam and the second laser beam to generate an evanescent wave on the substrate. The evanescent wave generates scattered light due to a defect of the substrate. The detecting unit detects the scattered light generated due to the defect of the substrate.

公开(公告)号：US20220115060A1

公开(公告)日：2022-04-14

申请号：US17478629

申请日：2021-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taemin Choi ,  Taehyun Kim ,  Seongook Jung

IPC: G11C11/419 ,  G11C11/418

Abstract: A memory device accessed by circuits operating based on a first supply voltage. The memory device includes a cell array electrically connected to a plurality of word lines and a plurality of bit lines; a row driver configured to select one word line of the plurality of word lines based on a row address; a precharge circuit configured to precharge the plurality of bit lines based on the first supply voltage; a column driver configured to select at least one bit line of the plurality of bit lines based on a column address; and a read circuit configured to read data stored in the cell array through the at least one bit line. The cell array, the row driver, the column driver, and the read circuit operate based on a second supply voltage, which is higher than the first supply voltage.

公开(公告)号：US20220068681A1

公开(公告)日：2022-03-03

申请号：US17229197

申请日：2021-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyunghun Han ,  Ingi Kim ,  Sangwoo Bae ,  Jungchul Lee ,  Minhwan Seo ,  Myeongock Ko ,  Youngjoo Lee ,  Taehyun Kim ,  Seulgi Lee

IPC: H01L21/67 ,  G02B7/02 ,  G06T5/20 ,  G06T7/00 ,  G01N21/65 ,  G01N21/41 ,  G01N21/95

Abstract: A wafer inspection apparatus includes: an objective lens on an optical path of first and second input beams; and an image sensor configured to generate an image of the wafer based on scattered light according to a nonlinear optical phenomenon based on the first and second input beams, wherein the first input beam passing through the objective lens is obliquely incident on the wafer at a first incident angle with respect to a vertical line that is normal to an upper surface of the wafer, the second input beam passing through the objective lens is incident on the wafer at a second incident angle oblique to the vertical line that is normal to the upper surface of the wafer, and the first and second incident angles are different from each other.

公开(公告)号：US20200065029A1

公开(公告)日：2020-02-27

申请号：US16394506

申请日：2019-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehyun Kim ,  Chankyung Kim ,  Sang-won Shim ,  Suk-Soo Pyo

IPC: G06F3/06 ,  G06F11/10 ,  G11C29/52

Abstract: An operating method of a storage device which includes a first nonvolatile memory device and a second nonvolatile memory device includes detecting sudden power-off, suspending an operation being performed in the first nonvolatile memory device, in response to the detected sudden power-off, writing suspension information about the suspended operation into the second nonvolatile memory device, and performing a block management operation on the first nonvolatile memory device based on the suspension information written into the second nonvolatile memory device, in power-up after the sudden power-off.

公开(公告)号：US09349457B2

公开(公告)日：2016-05-24

申请号：US14455344

申请日：2014-08-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taehyun Kim ,  Youngsun Min

IPC: G11C16/08 ,  H03K17/16 ,  G11C16/12 ,  G11C16/34

CPC classification number: G11C16/08 ,  G11C16/12 ,  G11C16/3418 ,  H03K17/165

Abstract: A high voltage switch operates in response to a first drive voltage and a second drive voltage higher than the first drive voltage. The high voltage switch includes a PMOS transistor transmitting the second drive voltage to an output terminal according to a voltage applied to its gate, a first depletion mode transistor providing the second drive voltage to the PMOS transistor according to an output signal fed back from the output terminal, a second depletion mode transistor receiving the second drive voltage through one end and providing a switching voltage to another end according to a switching control signal, and a level shifter providing the switching voltage to a gate of the PMOS transistor according to an enable signal and a reverse enable signal.

Abstract translation: 高电压开关响应于高于第一驱动电压的第一驱动电压和第二驱动电压而工作。 高压开关包括PMOS晶体管，其根据施加到其栅极的电压将第二驱动电压传输到输出端，第一耗尽模式晶体管，根据从输出端反馈的输出信号，向PMOS晶体管提供第二驱动电压 端子，第二耗尽型晶体管，通过一端接收第二驱动电压，并根据开关控制信号向另一端提供开关电压;以及电平移位器，根据使能信号向PMOS晶体管的栅极提供开关电压 和反向使能信号。

公开(公告)号：US09147489B2

公开(公告)日：2015-09-29

申请号：US14077769

申请日：2013-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taehyun Kim ,  Youngsun Min ,  Bilal Ahmad Janjua ,  Jeongdon Ihm

IPC: G11C16/06 ,  G11C16/30 ,  G11C16/04 ,  G11C16/12

CPC classification number: G11C16/30 ,  G11C16/0483 ,  G11C16/12

Abstract: A high voltage switch of a nonvolatile memory device includes a depletion type NMOS transistor configured to switch a second driving voltage in response to an output signal of the high voltage switch; at least one inverter configured to convert a voltage of an input signal of the high voltage switch into a first driving voltage or a ground voltage, wherein the first and second driving voltages are received from an external device; and a PMOS transistor configured to transfer the second driving voltage provided to a first terminal of the PMOS transistor from the depletion type NMOS transistor to a second terminal of the PMOS transistor as the output signal in response to an output of the at least one inverter, wherein the output of the at least one inverter is transferred to a gate terminal of the PMOS transistor.

Abstract translation: 非易失性存储器件的高电压开关包括耗尽型NMOS晶体管，其配置为响应于高电压开关的输出信号而切换第二驱动电压; 至少一个反相器，被配置为将高压开关的输入信号的电压转换为第一驱动电压或接地电压，其中从外部装置接收第一和第二驱动电压; 以及PMOS晶体管，被配置为响应于所述至少一个反相器的输出，将提供给所述PMOS晶体管的第一端子的所述第二驱动电压从所述耗尽型NMOS晶体管传送到所述PMOS晶体管的第二端子作为所述输出信号， 其中所述至少一个反相器的输出被传送到所述PMOS晶体管的栅极端子。