公开(公告)号：US20210233995A1

公开(公告)日：2021-07-29

申请号：US17212847

申请日：2021-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul SUN ,  Dae Won HA ,  Dong Hoon HWANG ,  Jong Hwa BAEK ,  Jong Min JEON ,  Seung Mo HA ,  Kwang Yong YANG ,  Jae Young PARK ,  Young Su CHUNG

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US20240047521A1

公开(公告)日：2024-02-08

申请号：US18488381

申请日：2023-10-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul SUN ,  Dae Won HA ,  Dong Hoon HWANG ,  Jong Hwa BAEK ,  Jong Min JEON ,  Seung Mo HA ,  Kwang Yong YANG ,  Jae Young PARK ,  Young Su CHUNG

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762

CPC classification number: H01L29/0649 ,  H01L27/0886 ,  H01L21/823431 ,  H01L21/76224 ,  H01L21/823481 ,  H01L29/41791

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US20170133275A1

公开(公告)日：2017-05-11

申请号：US15413472

申请日：2017-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon Hae KIM ,  Jin Wook LEE ,  Jong Ki JUNG ,  Myung II KANG ,  Kwang Yong YANG ,  Kwan Heum LEE ,  Byeong Chan LEE

IPC: H01L21/8234 ,  H01L21/308 ,  H01L29/08 ,  H01L21/311 ,  H01L27/092 ,  H01L29/78 ,  H01L27/088 ,  H01L29/165 ,  H01L27/11 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/3105

CPC classification number: H01L21/823431 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.