Semiconductor package system
    1.
    发明授权

    公开(公告)号:US11658090B2

    公开(公告)日:2023-05-23

    申请号:US17232495

    申请日:2021-04-16

    Inventor: Heungkyu Kwon

    CPC classification number: H01L23/3675 H01L23/3128 H01L23/3735 H01L25/16

    Abstract: A semiconductor package system includes a substrate, a first and a second semiconductor package, a first thermal conductive layer, a first passive device, and a heat radiation structure. The first and second semiconductor package and first passive device may be mounted on a top surface of the substrate. The first semiconductor package may include a first semiconductor chip that includes a plurality of logic circuits. The first thermal conductive layer may be on the first semiconductor package. The heat radiation structure may be on the first thermal conductive layer, the second semiconductor package, and the first passive device. The heat radiation structure may include a first bottom surface physically contacting the first thermal conductive layer, and a second bottom surface at a higher level than that of the first bottom surface. The second bottom surface may be on the second semiconductor package and/or the first passive device.

    Semiconductor package system
    2.
    发明授权

    公开(公告)号:US11075138B2

    公开(公告)日:2021-07-27

    申请号:US16397278

    申请日:2019-04-29

    Inventor: Heungkyu Kwon

    Abstract: Provided is a semiconductor package system. The system includes a substrate, a first semiconductor package on the substrate, a second semiconductor package on the substrate, a first passive element on the substrate, a heat dissipation structure on the first semiconductor package, the second semiconductor package, and the first passive element, and a first heat conduction layer between the first semiconductor package and the heat dissipation structure. A sum of a height of the first semiconductor package and a thickness of the first heat conduction layer may be greater than a height of the first passive element. The height of the first semiconductor package may be greater than a height of the second semiconductor package.

    Semiconductor module including multiple power management semiconductor packages

    公开(公告)号:US11600607B2

    公开(公告)日:2023-03-07

    申请号:US16744437

    申请日:2020-01-16

    Inventor: Heungkyu Kwon

    Abstract: A semiconductor module may include a system board including a top surface and a bottom surface, a module substrate provided on the top surface of the system board, a system semiconductor package mounted on the module substrate, and first and second power management semiconductor packages mounted on the module substrate. The first and second power management semiconductor packages may be spaced apart from each other in a first direction, which is parallel to a top surface of the module substrate, with the system semiconductor package interposed therebetween.

    Semiconductor package
    4.
    发明授权

    公开(公告)号:US11069623B2

    公开(公告)日:2021-07-20

    申请号:US16385089

    申请日:2019-04-16

    Inventor: Heungkyu Kwon

    Abstract: Provided is a semiconductor package. The semiconductor package may include a substrate, a semiconductor chip on the substrate, a passive element on the substrate, a conductive structure on the substrate, and an interposer substrate on the semiconductor chip, the passive element, and the conductive structure. The interposer substrate may be electrically connected to the conductive structure. A height of the passive element may be greater than a height of the semiconductor chip.

    Electronic device and operating method

    公开(公告)号:US12167312B2

    公开(公告)日:2024-12-10

    申请号:US17675307

    申请日:2022-02-18

    Abstract: An electronic device mounted in a vehicle and including; a temperature sensor configured to measure a temperature associated with a measurement target to generate a measured temperature, and a controller configured to operate in a normal operating mode if the measured temperature is less than a first reference temperature, and further configured to operate in a limited control mode if the measured temperature is greater than or equal to the first reference temperature. During the normal operating mode, the controller is enabled to perform a performance limiting function, and during the limited control mode, the controller is enabled to perform an emergency call (eCall) function and is disabled to perform a performance limiting function.

    Semiconductor package system
    7.
    发明授权

    公开(公告)号:US10991638B2

    公开(公告)日:2021-04-27

    申请号:US16390585

    申请日:2019-04-22

    Inventor: Heungkyu Kwon

    Abstract: A semiconductor package system includes a substrate, a first and a second semiconductor package, a first thermal conductive layer, a first passive device, and a heat radiation structure. The first and second semiconductor package and first passive device may be mounted on a top surface of the substrate. The first semiconductor package may include a first semiconductor chip that includes a plurality of logic circuits. The first thermal conductive layer may be on the first semiconductor package. The heat radiation structure may be on the first thermal conductive layer, the second semiconductor package, and the first passive device. The heat radiation structure may include a first bottom surface physically contacting the first thermal conductive layer, and a second bottom surface at a higher level than that of the first bottom surface. The second bottom surface may be on the second semiconductor package and/or the first passive device.

    SEMICONDUCTOR PACKAGE
    8.
    发明申请

    公开(公告)号:US20190355667A1

    公开(公告)日:2019-11-21

    申请号:US16385089

    申请日:2019-04-16

    Inventor: Heungkyu Kwon

    Abstract: Provided is a semiconductor package. The semiconductor package may include a substrate, a semiconductor chip on the substrate, a passive element on the substrate, a conductive structure on the substrate, and an interposer substrate on the semiconductor chip, the passive element, and the conductive structure. The interposer substrate may be electrically connected to the conductive structure. A height of the passive element may be greater than a height of the semiconductor chip.

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