公开(公告)号：US10734416B2

公开(公告)日：2020-08-04

申请号：US16439261

申请日：2019-06-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyangyul Kim ,  Dong-Ju Yang

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1343

Abstract: A display substrate includes a base substrate with a display area and a light-blocking area around the display area, a switching element disposed on the base substrate that includes a gate electrode electrically connected to a gate line extending in a first direction, a source electrode electrically connected to a data line extending in a second direction crossing the first direction, and a drain electrode spaced apart from the source electrode, a color filter layer disposed on the switching element, a first electrode disposed on the color filter layer, an insulation layer disposed on the first electrode, a second electrode disposed on the insulation layer that includes a slit, a dummy pattern disposed on substantially the same layer as the second electrode that overlaps the data line, and a data light-blocking pattern directly disposed on the dummy pattern that has substantially the same width as the data line.

公开(公告)号：US20190296053A1

公开(公告)日：2019-09-26

申请号：US16439261

申请日：2019-06-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： HYANGYUL KIM ,  Dong-Ju Yang

IPC: H01L27/12 ,  G02F1/1362

Abstract: A display substrate includes a base substrate with a display area and a light-blocking area around the display area, a switching element disposed on the base substrate that includes a gate electrode electrically connected to a gate line extending in a first direction, a source electrode electrically connected to a data line extending in a second direction crossing the first direction, and a drain electrode spaced apart from the source electrode, a color filter layer disposed on the switching element, a first electrode disposed on the color filter layer, an insulation layer disposed on the first electrode, a second electrode disposed on the insulation layer that includes a slit, a dummy pattern disposed on substantially the same layer as the second electrode that overlaps the data line, and a data light-blocking pattern directly disposed on the dummy pattern that has substantially the same width as the data line.

公开(公告)号：US09443877B2

公开(公告)日：2016-09-13

申请号：US14799060

申请日：2015-07-14

Applicant: Samsung Display Co., Ltd.

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L29/04 ,  H01L31/036 ,  H01L27/12 ,  H01L21/4757 ,  H01L21/441 ,  H01L21/475 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

公开(公告)号：US09520412B2

公开(公告)日：2016-12-13

申请号：US14798123

申请日：2015-07-13

Applicant: Samsung Display Co., Ltd.

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L21/00 ,  H01L21/84 ,  H01L27/12 ,  H01L21/4757 ,  H01L21/441 ,  H01L21/475 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

公开(公告)号：US10355024B2

公开(公告)日：2019-07-16

申请号：US15601984

申请日：2017-05-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyangyul Kim ,  Dong-Ju Yang

IPC: H01L27/12 ,  G02F1/1343 ,  G02F1/1362

Abstract: A display substrate includes a base substrate with a display area and a light-blocking area around the display area, a switching element disposed on the base substrate that includes a gate electrode electrically connected to a gate line extending in a first direction, a source electrode electrically connected to a data line extending in a second direction crossing the first direction, and a drain electrode spaced apart from the source electrode, a color filter layer disposed on the switching element, a first electrode disposed on the color filter layer, an insulation layer disposed on the first electrode, a second electrode disposed on the insulation layer that includes a slit, a dummy pattern disposed on substantially the same layer as the second electrode that overlaps the data line, and a data light-blocking pattern directly disposed on the dummy pattern that has substantially the same width as the data line.

公开(公告)号：US09406630B2

公开(公告)日：2016-08-02

申请号：US14579542

申请日：2014-12-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joo-Han Kim ,  Ki-Yong Song ,  Dong-Ju Yang ,  Hee-Joon Kim ,  Yeo-Geon Yoon ,  Sung-Hen Cho ,  Chang-Hoon Kim ,  Jae-Hong Kim ,  Yu-Gwang Jeong ,  Ki-Yeup Lee ,  Sang-Gab Kim ,  Yun-Jong Yeo ,  Shin-Il Choi ,  Ji-Young Park

IPC: H01L23/00 ,  G02F1/1362 ,  H01L27/12

CPC classification number: H01L24/05 ,  G02F1/136227 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L2224/04042 ,  H01L2924/14 ,  H01L2924/1426 ,  H01L2924/00

Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.

公开(公告)号：US09111805B2

公开(公告)日：2015-08-18

申请号：US14230787

申请日：2014-03-31

Applicant: Samsung Display Co., Ltd.

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

Abstract translation: 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。

公开(公告)号：US10209585B2

公开(公告)日：2019-02-19

申请号：US15595111

申请日：2017-05-15

Applicant: Samsung Display Co., Ltd.

Inventor： Dong-Ju Yang ,  Seungjin Kim ,  Beomsoo Park ,  Hyungchul Kim ,  Eunhye Park ,  Jeongeum Lee ,  Junki Lee ,  Jiyun Hong

IPC: H01L29/12 ,  G02F1/1343 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/137 ,  H01L27/12 ,  H01L29/786

Abstract: A display panel includes a first base substrate, a gate line disposed on the first base substrate and extending in a first direction, a gate electrode electrically connected to the gate line, a thin film transistor including an active pattern which includes a source area, a drain area and a channel area overlapping the gate electrode, a common electrode disposed on the first base substrate, where a common voltage is applied to the common electrode, an auxiliary common electrode line electrically connected to the common electrode, and including an opaque metal, a pixel electrode electrically connected to the thin film transistor, and disposed on the common electrode to overlap the common electrode, and a cover electrode connected to the auxiliary common electrode line, and overlapping the channel area.

公开(公告)号：US09443881B2

公开(公告)日：2016-09-13

申请号：US14518278

申请日：2014-10-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jean-Ho Song ,  Shin-Il Choi ,  Sun-Young Hong ,  Shi-Yul Kim ,  Ki-Yeup Lee ,  Jae-Hyoung Youn ,  Sung-Ryul Kim ,  O-Sung Seo ,  Yang-Ho Bae ,  Jong-Hyun Choung ,  Dong-Ju Yang ,  Bong-Kyun Kim ,  Hwa-Yeul Oh ,  Pil-Soon Hong ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Yu-Gwang Jeong ,  Jong-In Kim ,  Nam-Seok Suh

IPC: H01L29/04 ,  H01L27/12 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/42368 ,  H01L29/458 ,  H01L29/78669

Abstract: A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.

Abstract translation: 薄膜晶体管阵列面板包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线和漏极，钝化层 覆盖数据线和漏电极，并且具有露出漏电极的一部分的接触孔，以及通过接触孔与漏电极电连接的像素电极。 数据线和漏极各自具有包括钛的下层和铜的上层的双层，下层比上层宽，下层具有暴露的区域。 栅极绝缘层可以具有台阶形状。

公开(公告)号：US20150318312A1

公开(公告)日：2015-11-05

申请号：US14799060

申请日：2015-07-14

Applicant: Samsung Display Co.,Ltd

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.