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公开(公告)号：US09690310B2
公开(公告)日：2017-06-27
申请号：US14996372
申请日：2016-01-15
Applicant: SK hynix Inc.
Inventor： Yoon-Jae Shin
Abstract: An internal voltage generator includes: a comparison block suitable for comparing an internal voltage with a reference voltage and generating a first comparison signal having an analog level corresponding to a comparison result a first driving block suitable for driving an output terminal of the internal voltage with a source voltage in response to the first comparison signal; a logic block suitable for generating a second comparison signal having a logic level based on the first comparison signal; and a second driving block suitable for driving the output terminal of the internal voltage with the source voltage based on the second comparison signal.
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公开(公告)号：US20140337568A1
公开(公告)日：2014-11-13
申请号：US14219281
申请日：2014-03-19
Applicant: SK HYNIX INC.
Inventor： Byoung-Chan Oh , Yoon-Jae Shin
CPC classification number: G06F3/0673 , G05F1/465 , G05F1/466 , G05F1/575 , G05F1/70 , G05F3/30 , G11C5/147 , G11C11/1697 , G11C13/0038 , H02M3/1563
Abstract: Provided is an electronic device including a power supply circuit. The power supply circuit includes: a voltage driving unit configured to pull-up drive an output node and generate an output voltage; and a driving control unit configured to receive the output voltage, disable the voltage driving unit from the time at which a divided voltage obtained by dividing the output voltage at a set ratio becomes higher than a first level, and enable the voltage driving unit from the time at which the divided voltage becomes lower than a second level, which is higher than the first level.
Abstract translation: 提供了一种包括电源电路的电子设备。 电源电路包括：电压驱动单元，被配置为上拉驱动输出节点并产生输出电压; 以及驱动控制单元，被配置为接收所述输出电压，从所述电压驱动单元从通过将所述输出电压除以设定比率而获得的分压值变得高于第一电平的时间来禁用所述电压驱动单元，并且使得所述电压驱动单元从 分压电压变得低于高于第一电平的第二电平的时间。
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公开(公告)号：US09437289B2
公开(公告)日：2016-09-06
申请号：US14219381
申请日：2014-03-19
Applicant: SK hynix Inc.
Inventor： Byoung-Chan Oh , Yoon-Jae Shin
CPC classification number: G11C13/003 , G11C7/04 , G11C11/16 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0026 , G11C13/0038 , G11C13/004 , G11C13/0069 , G11C2213/74 , G11C2213/78 , G11C2213/79
Abstract: Provided an electronic device including a semiconductor memory unit. The semiconductor memory unit includes: a plurality of storage cells each including a variable resistance element of which resistance is changed in response to a current flowing across the variable resistance element and a selecting element coupled to one end of the variable resistance element; a plurality of word lines corresponding to the respective storage cells and each coupled to a selecting element of a corresponding storage cell; a first line coupled to one ends of the plurality of storage cells; a second line coupled to the other ends of the plurality of storage cells; a voltage adjuster configured to adjust the voltage levels of back bias voltages of the selecting elements of the plurality of storage cells; and an access control unit electrically coupled to the first and second lines and passing an access current to a selected storage cell among the plurality of storage cells.
Abstract translation: 提供一种包括半导体存储单元的电子设备。 半导体存储单元包括：多个存储单元，每个存储单元包括响应于流过可变电阻元件的电流而改变电阻的可变电阻元件和耦合到可变电阻元件的一端的选择元件; 对应于各个存储单元的多个字线，并且每个字线耦合到对应的存储单元的选择元件; 耦合到所述多个存储单元的一端的第一线; 耦合到所述多个存储单元的另一端的第二线; 电压调节器，被配置为调整所述多个存储单元的选择元件的反向偏置电压的电压电平; 以及访问控制单元，其电耦合到所述第一和第二线路，并且将访问电流传递到所述多个存储单元中的所选择的存储单元。
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Patent Agency Ranking
公开(公告)号：US20150049536A1
公开(公告)日：2015-02-19
申请号：US14219381
申请日：2014-03-19
Applicant: SK hynix Inc.
Inventor： Byoung-Chan Oh , Yoon-Jae Shin
IPC: G11C13/00
CPC classification number: G11C13/003 , G11C7/04 , G11C11/16 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0026 , G11C13/0038 , G11C13/004 , G11C13/0069 , G11C2213/74 , G11C2213/78 , G11C2213/79
Abstract: Provided an electronic device including a semiconductor memory unit. The semiconductor memory unit includes: a plurality of storage cells each including a variable resistance element of which resistance is changed in response to a current flowing across the variable resistance element and a selecting element coupled to one end of the variable resistance element; a plurality of word lines corresponding to the respective storage cells and each coupled to a selecting element of a corresponding storage cell; a first line coupled to one ends of the plurality of storage cells; a second line coupled to the other ends of the plurality of storage cells; a voltage adjuster configured to adjust the voltage levels of back bias voltages of the selecting elements of the plurality of storage cells; and an access control unit electrically coupled to the first and second lines and passing an access current to a selected storage cell among the plurality of storage cells.
Abstract translation: 提供一种包括半导体存储单元的电子设备。 半导体存储单元包括：多个存储单元，每个存储单元包括响应于流过可变电阻元件的电流而改变电阻的可变电阻元件和耦合到可变电阻元件的一端的选择元件; 对应于各个存储单元的多个字线，并且每个字线耦合到对应的存储单元的选择元件; 耦合到所述多个存储单元的一端的第一线; 耦合到所述多个存储单元的另一端的第二线; 电压调节器，被配置为调整所述多个存储单元的选择元件的反向偏置电压的电压电平; 以及访问控制单元，其电耦合到所述第一和第二线路，并且将访问电流传递到所述多个存储单元中的所选择的存储单元。
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5.发明授权公开(公告)号：US08767451B2
公开(公告)日：2014-07-01
申请号：US14133153
申请日：2013-12-18
Applicant: SK hynix Inc.
Inventor： Yoon-Jae Shin
IPC: G11C11/00
CPC classification number: G11C5/145 , G11C5/147 , G11C8/08 , G11C13/0004 , G11C13/0038
Abstract: An internal voltage generating circuit includes a divided voltage generator configured to generate a divided voltage by dividing a feedback internal voltage level at a division ratio corresponding to an operation mode control signal, a voltage detector configured to detect a level of the divided voltage based on a reference voltage level, an internal voltage generator configured to receive a supply voltage as power source and generate the internal voltage in response to an output signal of the voltage detector, and an under-driving unit configured to under-drive an internal voltage terminal to a supply voltage in an under-driving operation region that is determined in response to the operation mode control signal.
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6.发明授权Voltage generation circuit, semiconductor memory device including the same, and method for driving the same 有权电压产生电路，包括该电路的半导体存储器件及其驱动方法公开(公告)号：US09508398B1
公开(公告)日：2016-11-29
申请号：US15047273
申请日：2016-02-18
Applicant: SK hynix Inc.
Inventor： Yoon-Jae Shin , Jae-Boum Park
CPC classification number: G11C5/147 , G05F1/468 , G11C5/145 , G11C7/062 , G11C7/08 , G11C7/12 , G11C11/4074 , G11C11/4091
Abstract: A semiconductor memory device includes a voltage generation unit suitable for selecting one of the voltages which are supplied to a first and a second source voltage terminals, as a source voltage based on a driving mode signal, and generating a bit line precharge voltage by dividing the source voltage according to a resistance ratio determined based on the driving mode signal; a sense amplifier driving unit suitable for receiving the bit line precharge voltage based on a bit line precharge signal and a sense amplifier control signal, and providing a driving voltage through a pull-up power line and a pull-down power line; and a bit line sense amplifier suitable for sensing and amplifying data of a bit line pair by using the driving voltage supplied through the pull-up power line and the pull-down power line.
Abstract translation: 半导体存储器件包括：电压产生单元，适于选择提供给第一和第二源极电压端子的电压中的一个作为基于驱动模式信号的源极电压，并且通过将 源电压根据基于驱动模式信号确定的电阻比; 感测放大器驱动单元，适于基于位线预充电信号和读出放大器控制信号接收位线预充电电压，并通过上拉电源线和下拉电源线提供驱动电压; 以及适用于通过使用通过上拉电源线和下拉电源线提供的驱动电压来检测和放大位线对的数据的位线读出放大器。
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公开(公告)号：US09542124B2
公开(公告)日：2017-01-10
申请号：US14219281
申请日：2014-03-19
Applicant: SK hynix Inc.
Inventor： Byoung-Chan Oh , Yoon-Jae Shin
IPC: G06F1/26 , G05F1/46 , G06F3/06 , G11C5/14 , H02M3/156 , G11C11/16 , G11C13/00 , G05F3/30 , G05F1/70 , G05F1/575
CPC classification number: G06F3/0673 , G05F1/465 , G05F1/466 , G05F1/575 , G05F1/70 , G05F3/30 , G11C5/147 , G11C11/1697 , G11C13/0038 , H02M3/1563
Abstract: Provided is an electronic device including a power supply circuit. The power supply circuit includes: a voltage driving unit configured to pull-up drive an output node and generate an output voltage; and a driving control unit configured to receive the output voltage, disable the voltage driving unit from the time at which a divided voltage obtained by dividing the output voltage at a set ratio becomes higher than a first level, and enable the voltage driving unit from the time at which the divided voltage becomes lower than a second level, which is higher than the first level.
Abstract translation: 提供了一种包括电源电路的电子设备。 电源电路包括：电压驱动单元，被配置为上拉驱动输出节点并产生输出电压; 以及驱动控制单元，被配置为接收所述输出电压，从所述电压驱动单元从通过将所述输出电压除以设定比率而获得的分压值变得高于第一电平的时间来禁用所述电压驱动单元，并且使得所述电压驱动单元从 分压电压变得低于高于第一电平的第二电平的时间。
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8.发明授权Internal voltage generating circuit of phase change random access memory device and method thereof 有权相变随机存取存储器件的内部电压产生电路及其方法公开(公告)号：US08625380B2
公开(公告)日：2014-01-07
申请号：US13713862
申请日：2012-12-13
Applicant: SK hynix Inc.
Inventor： Yoon-Jae Shin
IPC: G11C5/14
CPC classification number: G11C5/145 , G11C5/147 , G11C8/08 , G11C13/0004 , G11C13/0038
Abstract: An internal voltage generating circuit includes a divided voltage generator configured to generate a divided voltage by dividing a feedback internal voltage level at a division ratio corresponding to an operation mode control signal, a voltage detector configured to detect a level of the divided voltage based on a reference voltage level, an internal voltage generator configured to receive a supply voltage as power source and generate the internal voltage in response to an output signal of the voltage detector, and an under-driving unit configured to under-drive an internal voltage terminal to a supply voltage in an under-driving operation region that is determined in response to the operation mode control signal.
Abstract translation: 内部电压发生电路包括分压电压发生器，其被配置为通过以与操作模式控制信号相对应的分频比除分反馈内部电压电平来产生分压，电压检测器被配置为基于 参考电压电平;内部电压发生器，被配置为响应于所述电压检测器的输出信号而接收电源电压并产生内部电压;以及驱动驱动单元，其被配置为将内部电压端子驱动到 在根据操作模式控制信号确定的低驱动操作区域中的电源电压。
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